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From: Nicholas Miehlbradt <nicholas@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com, clg@kaod.org,
	david@gibson.dropbear.id.au, groug@kaod.org,
	victor.colombo@eldorado.org.br,
	Nicholas Miehlbradt <nicholas@linux.ibm.com>
Subject: [PATCH 0/2] target/ppc: Implement Dynamic Execution Control Registers
Date: Thu, 24 Nov 2022 05:51:41 +0000	[thread overview]
Message-ID: <20221124055143.752601-1-nicholas@linux.ibm.com> (raw)

Implements the Dynamic Execution Control Register (DEXCR) and the
Hypervisor Dynamic Execution Control Register (HDEXCR) in TCG as 
defined in Power ISA 3.1B. Only aspects 5 (Non-privileged hash instruction 
enable) and 6 (Privileged hash instruction enable) have architectural 
effects. Other aspects can be manipulated but have no effect on execution.

Adds checks to these registers in the hashst and hashchk instructions so
that they are executed as nops when not enabled.

Nicholas Miehlbradt (2):
  target/ppc: Implement the DEXCR and HDEXCR
  target/ppc: Check DEXCR on hash{st, chk} instructions

 target/ppc/cpu.h         | 19 +++++++++++++
 target/ppc/cpu_init.c    | 25 +++++++++++++++++
 target/ppc/excp_helper.c | 58 +++++++++++++++++++++++++++++-----------
 target/ppc/spr_common.h  |  1 +
 target/ppc/translate.c   |  9 +++++++
 5 files changed, 97 insertions(+), 15 deletions(-)

-- 
2.34.1



             reply	other threads:[~2022-11-24  5:54 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-24  5:51 Nicholas Miehlbradt [this message]
2022-11-24  5:51 ` [PATCH 1/2] target/ppc: Implement the DEXCR and HDEXCR Nicholas Miehlbradt
2022-11-28 20:33   ` Daniel Henrique Barboza
2022-11-24  5:51 ` [PATCH 2/2] target/ppc: Check DEXCR on hash{st, chk} instructions Nicholas Miehlbradt
2022-11-28 20:35   ` Daniel Henrique Barboza
2022-11-25  5:48 ` [PATCH 0/2] target/ppc: Implement Dynamic Execution Control Registers Joel Stanley

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