From: Deepak Gupta <debug@rivosinc.com>
To: Guo Ren <guoren@kernel.org>
Cc: palmer@dabbelt.com, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, paul.walmsley@sifive.com,
Jisheng Zhang <jszhang@kernel.org>
Subject: Re: [PATCH] riscv: VMAP_STACK overflow detection thread-safe
Date: Thu, 24 Nov 2022 00:26:12 -0800 [thread overview]
Message-ID: <20221124082612.GC1149630@debug.ba.rivosinc.com> (raw)
In-Reply-To: <CAJF2gTSwMZQvSNxb2_5GNrVG0pwfXWsHmp8zZG=gFHnhc95bjQ@mail.gmail.com>
On Thu, Nov 24, 2022 at 09:32:19AM +0800, Guo Ren wrote:
>> +.macro asm_per_cpu dst sym tmp
>> + REG_L \tmp, TASK_TI_CPU_NUM(tp)
>> + slli \tmp, \tmp, 0x3
>> + la \dst, __per_cpu_offset
>> + add \dst, \dst, \tmp
>> + REG_L \tmp, 0(\dst)
>> + la \dst, \sym
>> + add \dst, \dst, \tmp
>Another tricky asm code of using percpu, I don't know how the percpu
>maintenance guy thinks.
On this, if you can point me to someone, I would like to get their feedback.
While discussing this, one issue that comes in my mind is if the shift of 0x3
is correct or not on 32bit systems. I don't know what's the size of each entry
in `__per_cpu_offset`. On 64bit it's 8 bytes and thus 3 bit shift.
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WARNING: multiple messages have this Message-ID (diff)
From: Deepak Gupta <debug@rivosinc.com>
To: Guo Ren <guoren@kernel.org>
Cc: palmer@dabbelt.com, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, paul.walmsley@sifive.com,
Jisheng Zhang <jszhang@kernel.org>
Subject: Re: [PATCH] riscv: VMAP_STACK overflow detection thread-safe
Date: Thu, 24 Nov 2022 00:26:12 -0800 [thread overview]
Message-ID: <20221124082612.GC1149630@debug.ba.rivosinc.com> (raw)
In-Reply-To: <CAJF2gTSwMZQvSNxb2_5GNrVG0pwfXWsHmp8zZG=gFHnhc95bjQ@mail.gmail.com>
On Thu, Nov 24, 2022 at 09:32:19AM +0800, Guo Ren wrote:
>> +.macro asm_per_cpu dst sym tmp
>> + REG_L \tmp, TASK_TI_CPU_NUM(tp)
>> + slli \tmp, \tmp, 0x3
>> + la \dst, __per_cpu_offset
>> + add \dst, \dst, \tmp
>> + REG_L \tmp, 0(\dst)
>> + la \dst, \sym
>> + add \dst, \dst, \tmp
>Another tricky asm code of using percpu, I don't know how the percpu
>maintenance guy thinks.
On this, if you can point me to someone, I would like to get their feedback.
While discussing this, one issue that comes in my mind is if the shift of 0x3
is correct or not on 32bit systems. I don't know what's the size of each entry
in `__per_cpu_offset`. On 64bit it's 8 bytes and thus 3 bit shift.
next prev parent reply other threads:[~2022-11-24 8:26 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-24 0:50 [PATCH] riscv: VMAP_STACK overflow detection thread-safe Deepak Gupta
2022-11-24 0:50 ` Deepak Gupta
2022-11-24 1:32 ` Guo Ren
2022-11-24 1:32 ` Guo Ren
2022-11-24 8:26 ` Deepak Gupta [this message]
2022-11-24 8:26 ` Deepak Gupta
2022-11-24 9:07 ` Deepak Gupta
2022-11-24 9:07 ` Deepak Gupta
[not found] ` <CAJF2gTQ=Vr6neABtz9JSCei6oPEsyWTpb-Y=Rxt5jy6n1VEtGA@mail.gmail.com>
2022-11-24 5:56 ` Deepak Gupta
2022-11-24 5:56 ` Deepak Gupta
2022-11-24 6:31 ` Guo Ren
2022-11-24 6:31 ` Guo Ren
2022-11-24 7:10 ` Deepak Gupta
2022-11-24 7:10 ` Deepak Gupta
2022-11-24 8:59 ` Conor Dooley
2022-11-24 8:59 ` Conor Dooley
2022-11-24 9:10 ` Deepak Gupta
2022-11-24 9:10 ` Deepak Gupta
2022-11-24 9:36 ` Guo Ren
2022-11-24 9:36 ` Guo Ren
2022-11-24 6:30 ` Conor Dooley
2022-11-24 6:30 ` Conor Dooley
2022-11-24 7:23 ` Deepak Gupta
2022-11-24 7:23 ` Deepak Gupta
2022-11-24 7:39 ` Conor Dooley
2022-11-24 7:39 ` Conor Dooley
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