From: Jiaxi Chen <jiaxi.chen@linux.intel.com>
To: kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com,
alexandre.belloni@bootlin.com, peterz@infradead.org,
jpoimboe@kernel.org, chang.seok.bae@intel.com,
pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com,
jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com,
sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com,
keescook@chromium.org, nathan@kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v5 3/8] x86: KVM: Advertise CMPccXADD CPUID to user space
Date: Fri, 25 Nov 2022 20:58:40 +0800 [thread overview]
Message-ID: <20221125125845.1182922-4-jiaxi.chen@linux.intel.com> (raw)
In-Reply-To: <20221125125845.1182922-1-jiaxi.chen@linux.intel.com>
CMPccXADD is a new set of instructions in the latest Intel platform
Sierra Forest. This new instruction set includes a semaphore operation
that can compare and add the operands if condition is met, which can
improve database performance.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[bit 7]
CMPccXADD is on an expected-dense CPUID leaf and some other bits on this
leaf have kernel usages. Given that, define this feature bit like
X86_FEATURE_<name> in kernel. Considering CMPccXADD itself has no truly
kernel usages and /proc/cpuinfo has too much unreadable flags, hide this
one in /proc/cpuinfo.
Advertise CMPCCXADD to KVM userspace. This is safe because there are no
new VMX controls or additional host enabling required for guests to use
this feature.
Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com>
Acked-by: Borislav Petkov <bp@suse.de>
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kvm/cpuid.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index b71f4f2ecdd5..5cdd57133d90 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -308,6 +308,7 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */
+#define X86_FEATURE_CMPCCXADD (12*32+ 7) /* "" CMPccXADD instructions */
/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index a3adac48766b..f8bf4fb30b96 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -663,7 +663,7 @@ void kvm_set_cpu_caps(void)
kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
kvm_cpu_cap_mask(CPUID_7_1_EAX,
- F(AVX_VNNI) | F(AVX512_BF16)
+ F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD)
);
kvm_cpu_cap_mask(CPUID_D_1_EAX,
--
2.27.0
next prev parent reply other threads:[~2022-11-25 12:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-25 12:58 [PATCH v5 0/8] x86: KVM: Advertise CPUID of new Intel platform instructions to user space Jiaxi Chen
2022-11-25 12:58 ` [PATCH v5 1/8] KVM: x86: Add BUILD_BUG_ON() to detect bad usage of "scattered" flags Jiaxi Chen
2022-11-25 12:58 ` [PATCH v5 2/8] KVM: x86: Update KVM-only leaf handling to allow for 100% KVM-only leafs Jiaxi Chen
2022-11-25 12:58 ` Jiaxi Chen [this message]
2022-11-25 12:58 ` [PATCH v5 4/8] x86: KVM: Advertise AMX-FP16 CPUID to user space Jiaxi Chen
2022-11-25 12:58 ` [PATCH v5 5/8] x86: KVM: Advertise AVX-IFMA " Jiaxi Chen
2022-11-25 12:58 ` [PATCH v5 6/8] KVM: x86: Advertise AVX-VNNI-INT8 " Jiaxi Chen
2022-11-25 12:58 ` [PATCH v5 7/8] KVM: x86: Advertise AVX-NE-CONVERT " Jiaxi Chen
2022-11-25 12:58 ` [PATCH v5 8/8] KVM: x86: Advertise PREFETCHIT0/1 " Jiaxi Chen
2022-11-28 18:33 ` [PATCH v5 0/8] x86: KVM: Advertise CPUID of new Intel platform instructions " Paolo Bonzini
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