All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, Robert Richter <rrichter@amd.com>,
	<alison.schofield@intel.com>, <terry.bowman@amd.com>,
	<bhelgaas@google.com>, <dave.jiang@intel.com>,
	<nvdimm@lists.linux.dev>
Subject: Re: [PATCH v6 05/12] cxl/acpi: Move rescan to the workqueue
Date: Fri, 2 Dec 2022 15:50:14 +0000	[thread overview]
Message-ID: <20221202155014.00006755@Huawei.com> (raw)
In-Reply-To: <166993042884.1882361.5633723613683058881.stgit@dwillia2-xfh.jf.intel.com>

On Thu, 01 Dec 2022 13:33:48 -0800
Dan Williams <dan.j.williams@intel.com> wrote:

> Now that the cxl_mem driver has a need to take the root device lock, the
> cxl_bus_rescan() needs to run outside of the root lock context.

If possible add a bit more detail here or a reference to the patch
that needs to take the root device lock.

Change seems fine otherwise, so FWIW

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> 
> Tested-by: Robert Richter <rrichter@amd.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> ---
>  drivers/cxl/acpi.c      |   17 +++++++++++++++--
>  drivers/cxl/core/port.c |   19 +++++++++++++++++--
>  drivers/cxl/cxl.h       |    3 ++-
>  3 files changed, 34 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index c540da0cbf1e..b8407b77aff6 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -511,7 +511,8 @@ static int cxl_acpi_probe(struct platform_device *pdev)
>  		return rc;
>  
>  	/* In case PCI is scanned before ACPI re-trigger memdev attach */
> -	return cxl_bus_rescan();
> +	cxl_bus_rescan();
> +	return 0;
>  }
>  
>  static const struct acpi_device_id cxl_acpi_ids[] = {
> @@ -535,7 +536,19 @@ static struct platform_driver cxl_acpi_driver = {
>  	.id_table = cxl_test_ids,
>  };
>  
> -module_platform_driver(cxl_acpi_driver);
> +static int __init cxl_acpi_init(void)
> +{
> +	return platform_driver_register(&cxl_acpi_driver);
> +}
> +
> +static void __exit cxl_acpi_exit(void)
> +{
> +	platform_driver_unregister(&cxl_acpi_driver);
> +	cxl_bus_drain();
> +}
> +
> +module_init(cxl_acpi_init);
> +module_exit(cxl_acpi_exit);
>  MODULE_LICENSE("GPL v2");
>  MODULE_IMPORT_NS(CXL);
>  MODULE_IMPORT_NS(ACPI);
> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> index 0d2f5eaaca7d..d225267c69bb 100644
> --- a/drivers/cxl/core/port.c
> +++ b/drivers/cxl/core/port.c
> @@ -1844,12 +1844,27 @@ static void cxl_bus_remove(struct device *dev)
>  
>  static struct workqueue_struct *cxl_bus_wq;
>  
> -int cxl_bus_rescan(void)
> +static void cxl_bus_rescan_queue(struct work_struct *w)
>  {
> -	return bus_rescan_devices(&cxl_bus_type);
> +	int rc = bus_rescan_devices(&cxl_bus_type);
> +
> +	pr_debug("CXL bus rescan result: %d\n", rc);
> +}
> +
> +void cxl_bus_rescan(void)
> +{
> +	static DECLARE_WORK(rescan_work, cxl_bus_rescan_queue);
> +
> +	queue_work(cxl_bus_wq, &rescan_work);
>  }
>  EXPORT_SYMBOL_NS_GPL(cxl_bus_rescan, CXL);
>  
> +void cxl_bus_drain(void)
> +{
> +	drain_workqueue(cxl_bus_wq);
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_bus_drain, CXL);
> +
>  bool schedule_cxl_memdev_detach(struct cxl_memdev *cxlmd)
>  {
>  	return queue_work(cxl_bus_wq, &cxlmd->detach_work);
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index f0ca2d768385..281b1db5a271 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -552,7 +552,8 @@ int devm_cxl_add_endpoint(struct cxl_memdev *cxlmd,
>  			  struct cxl_dport *parent_dport);
>  struct cxl_port *find_cxl_root(struct device *dev);
>  int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd);
> -int cxl_bus_rescan(void);
> +void cxl_bus_rescan(void);
> +void cxl_bus_drain(void);
>  struct cxl_port *cxl_mem_find_port(struct cxl_memdev *cxlmd,
>  				   struct cxl_dport **dport);
>  bool schedule_cxl_memdev_detach(struct cxl_memdev *cxlmd);
> 


  reply	other threads:[~2022-12-02 15:50 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01 21:33 [PATCH v6 00/12] cxl: Add support for Restricted CXL hosts (RCD mode) Dan Williams
2022-12-01 21:33 ` [PATCH v6 01/12] cxl/acpi: Simplify cxl_nvdimm_bridge probing Dan Williams
2022-12-02 15:02   ` Jonathan Cameron
2022-12-01 21:33 ` [PATCH v6 02/12] cxl/region: Drop redundant pmem region release handling Dan Williams
2022-12-02 15:43   ` Jonathan Cameron
2022-12-01 21:33 ` [PATCH v6 03/12] cxl/pmem: Refactor nvdimm device registration, delete the workqueue Dan Williams
2022-12-02 15:42   ` Jonathan Cameron
2022-12-01 21:33 ` [PATCH v6 04/12] cxl/pmem: Remove the cxl_pmem_wq and related infrastructure Dan Williams
2022-12-02 15:44   ` Jonathan Cameron
2022-12-01 21:33 ` [PATCH v6 05/12] cxl/acpi: Move rescan to the workqueue Dan Williams
2022-12-02 15:50   ` Jonathan Cameron [this message]
2022-12-03  7:14     ` Dan Williams
2022-12-01 21:33 ` [PATCH v6 06/12] tools/testing/cxl: Make mock CEDT parsing more robust Dan Williams
2022-12-01 21:57   ` Dave Jiang
2022-12-02 15:58   ` Jonathan Cameron
2022-12-03  7:22     ` Dan Williams
2022-12-01 21:33 ` [PATCH v6 07/12] cxl/ACPI: Register CXL host ports by bridge device Dan Williams
2022-12-01 22:00   ` Dave Jiang
2022-12-02 16:11   ` Jonathan Cameron
2022-12-03  7:28     ` Dan Williams
2022-12-01 21:34 ` [PATCH v6 08/12] cxl/acpi: Extract component registers of restricted hosts from RCRB Dan Williams
2022-12-01 23:55   ` Dave Jiang
2022-12-02  8:16   ` Robert Richter
2022-12-03  7:04     ` Dan Williams
2022-12-03  8:41       ` Dan Williams
2022-12-03 16:03       ` Robert Richter
2022-12-03 17:06         ` Dan Williams
2022-12-02 16:38   ` Jonathan Cameron
2022-12-03  7:39     ` Dan Williams
2022-12-01 21:34 ` [PATCH v6 09/12] cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem Dan Williams
2022-12-02 16:40   ` Jonathan Cameron
2022-12-01 21:34 ` [PATCH v6 10/12] cxl/port: Add RCD endpoint port enumeration Dan Williams
2022-12-02  8:21   ` Robert Richter
2022-12-03  7:05     ` Dan Williams
2022-12-02 16:45   ` Jonathan Cameron
2022-12-01 21:34 ` [PATCH v6 11/12] tools/testing/cxl: Add an RCH topology Dan Williams
2022-12-02  8:05   ` Robert Richter
2022-12-02 17:04   ` Jonathan Cameron
2022-12-03  7:50     ` Dan Williams
2022-12-01 21:34 ` [PATCH v6 12/12] cxl/acpi: Set ACPI's CXL _OSC to indicate RCD mode support Dan Williams
2022-12-02 17:05   ` Jonathan Cameron

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221202155014.00006755@Huawei.com \
    --to=jonathan.cameron@huawei.com \
    --cc=alison.schofield@intel.com \
    --cc=bhelgaas@google.com \
    --cc=dan.j.williams@intel.com \
    --cc=dave.jiang@intel.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=nvdimm@lists.linux.dev \
    --cc=rrichter@amd.com \
    --cc=terry.bowman@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.