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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id g1-20020a17090604c100b0073dc5bb7c32sm5240058eja.64.2022.12.04.07.06.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:06:33 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 033/149] global: Migrate CONFIG_FSL_PMIC_BITLEN to CFG Date: Sun, 4 Dec 2022 10:03:58 -0500 Message-Id: <20221204150554.4165941-33-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204150554.4165941-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204150554.4165941-1-trini@konsulko.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_FSL_PMIC_BITLEN to CFG_FSL_PMIC_BITLEN Signed-off-by: Tom Rini --- drivers/power/power_fsl.c | 2 +- include/configs/mx51evk.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/power/power_fsl.c b/drivers/power/power_fsl.c index 9bb7e39f2cc2..eace4dd7e433 100644 --- a/drivers/power/power_fsl.c +++ b/drivers/power/power_fsl.c @@ -42,7 +42,7 @@ int pmic_init(unsigned char bus) p->hw.spi.cs = CONFIG_FSL_PMIC_CS; p->hw.spi.clk = CONFIG_FSL_PMIC_CLK; p->hw.spi.mode = CONFIG_FSL_PMIC_MODE; - p->hw.spi.bitlen = CONFIG_FSL_PMIC_BITLEN; + p->hw.spi.bitlen = CFG_FSL_PMIC_BITLEN; p->hw.spi.flags = SPI_XFER_BEGIN | SPI_XFER_END; p->hw.spi.prepare_tx = pmic_spi_prepare_tx; #elif defined(CONFIG_POWER_I2C) diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 8ab1ee79a79c..d4cca8d516a6 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -25,7 +25,7 @@ #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC_BITLEN 32 +#define CFG_FSL_PMIC_BITLEN 32 /* * MMC Configs -- 2.25.1