From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: andersson@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, bp@alien8.de,
tony.luck@intel.com, quic_saipraka@quicinc.com,
konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, james.morse@arm.com,
mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org,
quic_ppareek@quicinc.com, luca.weiss@fairphone.com,
stable@vger.kernel.org
Subject: Re: [PATCH v2 04/13] arm64: dts: qcom: sc7180: Remove reg-names property from LLCC node
Date: Tue, 13 Dec 2022 22:46:47 +0530 [thread overview]
Message-ID: <20221213171647.GE4862@thinkpad> (raw)
In-Reply-To: <e57ffec7-6757-5cd8-7764-28f6edb95985@linaro.org>
On Tue, Dec 13, 2022 at 05:30:09PM +0100, Krzysztof Kozlowski wrote:
> On 12/12/2022 13:33, Manivannan Sadhasivam wrote:
> > The LLCC block has several banks each with a different base address
> > and holes in between. So it is not a correct approach to cover these
> > banks with a single offset/size. Instead, the individual bank's base
> > address needs to be specified in devicetree with the exact size.
> >
> > On SC7180, there is only one LLCC bank available. So only change needed is
> > to remove the reg-names property from LLCC node to conform to the binding.
> >
> > The driver is expected to parse the reg field based on index to get the
> > addresses of each LLCC banks.
> >
> > Cc: <stable@vger.kernel.org> # 5.6
>
> Oh, no, there is no single bug here. Binding from v5.6+ (which cannot be
> changed) required/defined such reg-names. This is neither a bug nor
> possible to backport.
>
> > Fixes: c831fa299996 ("arm64: dts: qcom: sc7180: Add Last level cache controller node")
>
> Drop.
>
> > Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> > arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 -
> > 1 file changed, 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> > index f71cf21a8dd8..b0d524bbf051 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> > @@ -2759,7 +2759,6 @@ dc_noc: interconnect@9160000 {
> > system-cache-controller@9200000 {
> > compatible = "qcom,sc7180-llcc";
> > reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>;
> > - reg-names = "llcc_base", "llcc_broadcast_base";
>
> That's an ABI break...
>
As agreed, I will keep reg-names in dts for now.
Thanks,
Mani
> > interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
> > };
> >
>
> Best regards,
> Krzysztof
>
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2022-12-13 17:16 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-12 12:32 [PATCH v2 00/13] Qcom: LLCC/EDAC: Fix base address used for LLCC banks Manivannan Sadhasivam
2022-12-12 12:32 ` [PATCH v2 01/13] dt-bindings: arm: msm: Update the maintainers for LLCC Manivannan Sadhasivam
2022-12-13 16:20 ` Krzysztof Kozlowski
2022-12-12 12:33 ` [PATCH v2 02/13] dt-bindings: arm: msm: Fix register regions used for LLCC banks Manivannan Sadhasivam
2022-12-13 16:24 ` Krzysztof Kozlowski
2022-12-13 17:30 ` Manivannan Sadhasivam
2022-12-13 18:34 ` Krzysztof Kozlowski
2022-12-13 16:28 ` Krzysztof Kozlowski
2022-12-12 12:33 ` [PATCH v2 03/13] arm64: dts: qcom: sdm845: Fix the base addresses of " Manivannan Sadhasivam
2022-12-13 5:04 ` Sai Prakash Ranjan
2022-12-13 16:27 ` Krzysztof Kozlowski
2022-12-13 17:13 ` Manivannan Sadhasivam
2022-12-13 18:37 ` Krzysztof Kozlowski
2022-12-12 12:33 ` [PATCH v2 04/13] arm64: dts: qcom: sc7180: Remove reg-names property from LLCC node Manivannan Sadhasivam
2022-12-13 5:05 ` Sai Prakash Ranjan
2022-12-13 16:30 ` Krzysztof Kozlowski
2022-12-13 17:16 ` Manivannan Sadhasivam [this message]
2022-12-12 12:33 ` [PATCH v2 05/13] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks Manivannan Sadhasivam
2022-12-13 5:06 ` Sai Prakash Ranjan
2022-12-13 16:30 ` Krzysztof Kozlowski
2022-12-12 12:33 ` [PATCH v2 06/13] arm64: dts: qcom: sc8280xp: " Manivannan Sadhasivam
2022-12-13 5:06 ` Sai Prakash Ranjan
2022-12-12 12:33 ` [PATCH v2 07/13] arm64: dts: qcom: sm8150: " Manivannan Sadhasivam
2022-12-13 5:07 ` Sai Prakash Ranjan
2022-12-12 12:33 ` [PATCH v2 08/13] arm64: dts: qcom: sm8250: " Manivannan Sadhasivam
2022-12-13 5:07 ` Sai Prakash Ranjan
2022-12-12 12:33 ` [PATCH v2 09/13] arm64: dts: qcom: sm8350: " Manivannan Sadhasivam
2022-12-13 5:08 ` Sai Prakash Ranjan
2022-12-12 12:33 ` [PATCH v2 10/13] arm64: dts: qcom: sm8450: " Manivannan Sadhasivam
2022-12-13 5:08 ` Sai Prakash Ranjan
2022-12-12 12:33 ` [PATCH v2 11/13] arm64: dts: qcom: sm6350: Remove reg-names property from LLCC node Manivannan Sadhasivam
2022-12-13 5:09 ` Sai Prakash Ranjan
2022-12-13 16:31 ` Krzysztof Kozlowski
2022-12-13 17:17 ` Manivannan Sadhasivam
2022-12-12 12:33 ` [PATCH v2 12/13] qcom: llcc/edac: Fix the base address used for accessing LLCC banks Manivannan Sadhasivam
2022-12-13 2:58 ` kernel test robot
2022-12-13 16:37 ` Krzysztof Kozlowski
2022-12-13 17:44 ` Manivannan Sadhasivam
2022-12-13 18:44 ` Krzysztof Kozlowski
2022-12-12 12:33 ` [PATCH v2 13/13] qcom: llcc/edac: Support polling mode for ECC handling Manivannan Sadhasivam
2022-12-12 15:53 ` Luca Weiss
2022-12-12 16:16 ` Manivannan Sadhasivam
2022-12-12 19:23 ` [PATCH v2 00/13] Qcom: LLCC/EDAC: Fix base address used for LLCC banks Andrew Halaney
2022-12-13 5:28 ` Manivannan Sadhasivam
2022-12-13 16:17 ` Andrew Halaney
2022-12-13 16:54 ` Krzysztof Kozlowski
2022-12-13 17:57 ` Manivannan Sadhasivam
2022-12-13 18:47 ` Krzysztof Kozlowski
2022-12-19 13:50 ` Manivannan Sadhasivam
2022-12-19 14:11 ` Krzysztof Kozlowski
2022-12-19 14:16 ` Manivannan Sadhasivam
2022-12-19 14:21 ` Krzysztof Kozlowski
2022-12-19 16:49 ` Dmitry Baryshkov
2022-12-19 17:31 ` Manivannan Sadhasivam
2022-12-19 18:31 ` Manivannan Sadhasivam
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