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[2603:6081:7b00:6400:9de:b540:f7da:b28e]) by smtp.gmail.com with ESMTPSA id x8-20020ac84d48000000b00398a7c860c2sm569008qtv.4.2022.12.13.13.33.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Dec 2022 13:33:16 -0800 (PST) Date: Tue, 13 Dec 2022 16:33:14 -0500 From: Tom Rini To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Vagrant Cascadian , Aurelien Jarno , u-boot@lists.denx.de Subject: Re: [PATCH u-boot] powerpc/mpc85xx: Pass correct cpu compiler flags Message-ID: <20221213213314.GE3787616@bill-the-cat> References: <20221211141204.8153-1-pali@kernel.org> <20221213210238.j3ust7ge2s42tlzb@pali> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="mY0J3fFHwOqpt1u8" Content-Disposition: inline In-Reply-To: <20221213210238.j3ust7ge2s42tlzb@pali> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean --mY0J3fFHwOqpt1u8 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Dec 13, 2022 at 10:02:38PM +0100, Pali Roh=E1r wrote: > Vagrant and Aurelien, could you test if this change fully fixes your > Debian issue? >=20 > Tom, do you have any opinion for this change? It should help building > with binutils 2.38. I have both of your toolchain flag patches in my queue to not forget for v2023.01. >=20 > On Sunday 11 December 2022 15:12:04 Pali Roh=E1r wrote: > > When gcc's default cpu (selected by --with-cpu=3D during gcc's configure > > phase) does not match target u-boot board cpu then u-boot binary does n= ot > > have to be compiled correctly. Lot of distributions sets gcc's default = cpu > > to generic powerpc variant which works fine. > >=20 > > U-Boot already pass -Wa,-me500 flag to gcc which instructs GNU AS to ac= cept > > e500 specific instructions when processing assembler source files (.S). > >=20 > > This affects also assembly files generated by gcc from C source files. = And > > because gcc for generic powerpc cpu puts '.machine ppc' at the beginnin= g of > > the generated assembly file, it basically overwrites -me500 flag by whi= ch > > was GNU AS invoked (from U-boot build system). > >=20 > > It started to be an issue since binutils 2.38 which does not keep enabl= ed > > extra functional units selected by previous cpu. Hence issuing directive > > '.machine ppc' (generated by gcc for generic powerpc) after '.machine e= 500' > > (specifying at command line) disables usage of e500 specific instructio= ns. > >=20 > > And compiling arch/powerpc/cpu/mpc85xx/tlb.c code throws following > > assembler errors: > >=20 > > {standard input}: Assembler messages: > > {standard input}:127: Error: unrecognized opcode: `tlbre' > > {standard input}:418: Error: unrecognized opcode: `tlbre' > > {standard input}:821: Error: unrecognized opcode: `msync' > > {standard input}:821: Error: unrecognized opcode: `tlbwe' > > {standard input}:884: Error: unrecognized opcode: `tlbsx' > >=20 > > This issue was already hit by Debian people and is reported in bug trac= ker: > > https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=3D1003490 > >=20 > > Calling gcc with -mcpu=3D8540 flag fixes this issue because -mcpu=3D854= 0 tells > > gcc to compile code for e500 core/cpu (overwriting gcc's default cpu) a= nd > > does not put '.machine ppc' directive into assembly anymore. > >=20 > > Also if gcc is invoked with -mpcu=3D8540 then it pass -me500 flag to GN= U AS. > > So it is needed to specify -Wa,-me500 flag because it is implicitly add= ed. > >=20 > > Fix this issue properly by specifying correct -mcpu compiler flag for a= ll > > supported powerpc cores in U-Boot mpc85xx platform, which are: e500v1, > > e500v2, e500mc, e5500 and e6500. For specifying e500v1 and e500v2 cores, > > gcc has unintuitive -mcpu=3D8540 flag name, for other cores -mcpu match= es > > core name. > >=20 > > Older gcc versions (up to gcc 8) had also -mcpu=3D8548 flag for specify= ing > > e500v2 cores but the only difference between -mcpu=3D8540 and -mcpu=3D8= 548 was > > HW support of double precision floating point. So it is fine to use > > -mcpu=3D8540 for both e500v1 and e500v2 cores as u-boot does not use fl= oating > > point arithmetic. > >=20 > > Note that U-Boot's CONFIG_E500 option is set also for other cpus, not o= nly > > for e500v1 and e500v2. So do not check for CONFIG_E500 and rather set e= 500 > > as last fallback value when no other mpc85xx cpu matches. > >=20 > > Signed-off-by: Pali Roh=E1r > > --- > > arch/powerpc/cpu/mpc85xx/config.mk | 12 +++++++++++- > > 1 file changed, 11 insertions(+), 1 deletion(-) > >=20 > > diff --git a/arch/powerpc/cpu/mpc85xx/config.mk b/arch/powerpc/cpu/mpc8= 5xx/config.mk > > index 7a1d81cf2d76..b6b5d2053aea 100644 > > --- a/arch/powerpc/cpu/mpc85xx/config.mk > > +++ b/arch/powerpc/cpu/mpc85xx/config.mk > > @@ -3,7 +3,7 @@ > > # (C) Copyright 2002,2003 Motorola Inc. > > # Xianghua Xiao, X.Xiao@motorola.com > > =20 > > -PLATFORM_CPPFLAGS +=3D -Wa,-me500 -msoft-float -mno-string > > +PLATFORM_CPPFLAGS +=3D -msoft-float -mno-string > > PLATFORM_RELFLAGS +=3D -msingle-pic-base -fno-jump-tables > > =20 > > # -mspe=3Dyes is needed to have -mno-spe accepted by a buggy GCC; > > @@ -11,3 +11,13 @@ PLATFORM_RELFLAGS +=3D -msingle-pic-base -fno-jump-t= ables > > # http://gcc.gnu.org/ml/gcc-patches/2008-04/msg00311.html > > PLATFORM_CPPFLAGS +=3D $(call cc-option,-mspe=3Dyes) \ > > $(call cc-option,-mno-spe) > > + > > +ifdef CONFIG_E6500 > > +PLATFORM_CPPFLAGS +=3D -mcpu=3De6500 > > +else ifdef CONFIG_E5500 > > +PLATFORM_CPPFLAGS +=3D -mcpu=3De5500 > > +else ifdef CONFIG_E500MC > > +PLATFORM_CPPFLAGS +=3D -mcpu=3De500mc > > +else > > +PLATFORM_CPPFLAGS +=3D -mcpu=3D8540 > > +endif > > --=20 > > 2.20.1 > >=20 --=20 Tom --mY0J3fFHwOqpt1u8 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmOY75cACgkQFHw5/5Y0 tyy0zgv/XvKFmoCjzjbLdV4RheJ5nUVsEez5lbonIP5opuZgdPbz+MCGkoPUOWQo ubXXb5ne+Miy3gDXYU28XfV7WfGEgwnx7QJtLvkyygbJVwxygvy/dWp6ooKpY6zc eVv8BSrIiIPQk17SUD2y7U+MjZzzEw3/73q6j0bIE4nbDFf7xDFPZx31YAFDCfFH 5+eq3x0bawEyZcVufDhsAHMiiwEBeKnA9s8o2rBeCo0j511U4KgjyNF+LoCsdC98 u3DMQfLKYMq2potrytsfvY98rBuZQCBAw1EEQ+bg47d4KzAW0+IqB0+smc1apKP2 eSlOLbsrS3Q9ASyXkWsLDKOvR//Ksaeft8O4e0w9e3XDWh+EW9T6LwL7kf5Z/5rL CFgLpJYuymHcezarRD3FWKmmxVgPg2D1suhbFJyzlliJHmBsH13Jy1JXIzIQwKYc teGIl2ZDYE0uZ96dVmAniyUfZ3bDYaFa2KaCYuQNwYK8E+7O7Gl0tsqLAfbdip9/ zWcMei6h =aRC1 -----END PGP SIGNATURE----- --mY0J3fFHwOqpt1u8--