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Tsirkin" To: Bernhard Beschow Cc: qemu-devel@nongnu.org, =?iso-8859-1?Q?Herv=E9?= Poussineau , Marcel Apfelbaum , John Snow , qemu-block@nongnu.org, Igor Mammedov , Gerd Hoffmann , Aurelien Jarno , Richard Henderson , Paolo Bonzini , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Eduardo Habkost , Ani Sinha , Jiaxun Yang Subject: Re: [PATCH 00/32] Consolidate PIIX south bridges Message-ID: <20221220094738-mutt-send-email-mst@kernel.org> References: <20221204190553.3274-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20221204190553.3274-1-shentey@gmail.com> Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Sun, Dec 04, 2022 at 08:05:21PM +0100, Bernhard Beschow wrote: > This series consolidates the implementations of the PIIX3 and PIIX4 south > bridges and is an extended version of [1]. The motivation is to share as much > code as possible and to bring both device models to feature parity such that > perhaps PIIX4 can become a drop-in-replacement for PIIX3 in the pc machine. This > could resolve the "Frankenstein" PIIX4-PM problem in PIIX3 discussed on this > list before. > > The series is structured as follows: First, PIIX3 is changed to instantiate > internal devices itself, like PIIX4 does already. Second, PIIX3 gets prepared > for the merge with PIIX4 which includes some fixes, cleanups, and renamings. > Third, the same is done for PIIX4. In step four the implementations are merged. > Since some consolidations could be done easier with merged implementations, the > consolidation continues in step five which concludes the series. > > One particular challenge in this series was that the PIC of PIIX3 used to be > instantiated outside of the south bridge while some sub functions require a PIC > with populated qemu_irqs. This has been solved by introducing a proxy PIC which > furthermore allows PIIX3 to be agnostic towards the virtualization technology > used (KVM, TCG, Xen). Due to consolidation PIIX4 gained the proxy PIC as well. > > Another challenge was dealing with optional devices where Peter already gave > advice in [1] which this series implements. > > A challenge still remains with consolidating PCI interrupt handling. There are > still board-specific piix3_pci_slot_get_pirq() and piix4_pci_slot_get_pirq() > which are implemented in isa/piix.c. Any advice how to resolve these would be > highly appreaciated. See [2] for details. > > Last but not least there might be some opportunity to consolidate VM state > handling, probably by reusing the one from PIIX3. Since I'm not very familiar > with the requirements I didn't touch it so far. > > Testing done: > * make check > * make check-avocado > * Boot live CD: > * `qemu-system-x86_64 -M pc -m 2G -accel kvm -cpu host -cdrom manjaro-kde-21.3.2-220704-linux515.iso` > * `qemu-system-x86_64 -M q35 -m 2G -accel kvm -cpu host -cdrom manjaro-kde-21.3.2-220704-linux515.iso` > * 'qemu-system-mips64el -M malta -kernel vmlinux-3.2.0-4-5kc-malta -hda debian_wheezy_mipsel_standard.qcow2 -append "root=/dev/sda1 console=ttyS0"` > > v3: > - Introduce one TYPE_ICH9_USB_UHCI(fn) rather than several TYPE_ICH9_USB_UHCIx (Philippe) > - Make proxy PIC generic (Philippe) > - Track Malta's PIIX dependencies through KConfig > - Rebase onto Philippe's 'hw/isa/piix4: Remove MIPS Malta specific bits' series [3] > - Also rebase onto latest master to resolve merge conflicts. This required copying > Philippe's series as first three patches - please ignore. So IIUC, you are waiting for Philippe to respin his series then you can include it all in v4, right? > v2: > - Introduce TYPE_ defines for IDE and USB device models (Mark) > - Omit unexporting of PIIXState (Mark) > - Improve commit message of patch 5 to mention reset triggering through PCI > configuration space (Mark) > - Move reviewed patches w/o dependencies to the bottom of the series for early > upstreaming > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2022-07/msg02348.html > [2] https://lists.nongnu.org/archive/html/qemu-devel/2022-11/msg03310.html > [3] https://lists.nongnu.org/archive/html/qemu-devel/2022-10/msg05367.html > > Bernhard Beschow (29): > hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig > hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 > south bridge > hw/usb/hcd-uhci: Introduce TYPE_ defines for device models > hw/i386/pc: Create RTC controllers in south bridges > hw/i386/pc: No need for rtc_state to be an out-parameter > hw/isa/piix3: Create USB controller in host device > hw/isa/piix3: Create power management controller in host device > hw/core: Introduce proxy-pic > hw/isa/piix3: Create Proxy PIC in host device > hw/isa/piix3: Create IDE controller in host device > hw/isa/piix3: Wire up ACPI interrupt internally > hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS > hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 > hw/isa/piix3: Rename piix3_reset() for sharing with PIIX4 > hw/isa/piix3: Prefix pci_slot_get_pirq() with "piix3_" > hw/isa/piix3: Rename typedef PIIX3State to PIIXState > hw/isa/piix4: Make PIIX4's ACPI and USB functions optional > hw/isa/piix4: Remove unused code > hw/isa/piix4: Use Proxy PIC device > hw/isa/piix4: Reuse struct PIIXState from PIIX3 > hw/isa/piix4: Rename reset control operations to match PIIX3 > hw/isa/piix4: Prefix pci_slot_get_pirq() with "piix4_" > hw/isa/piix3: Merge hw/isa/piix4.c > hw/isa/piix: Harmonize names of reset control memory regions > hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 > hw/isa/piix: Rename functions to be shared for interrupt triggering > hw/isa/piix: Consolidate IRQ triggering > hw/isa/piix: Share PIIX3 base class with PIIX4 > hw/isa/piix: Drop the "3" from the PIIX base class > > Philippe Mathieu-Daudé (3): > hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition > hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader > hw/isa/piix4: Correct IRQRC[A:D] reset values > > MAINTAINERS | 8 +- > configs/devices/mips-softmmu/common.mak | 2 - > hw/core/Kconfig | 3 + > hw/core/meson.build | 1 + > hw/core/proxy-pic.c | 70 +++++ > hw/i386/Kconfig | 4 +- > hw/i386/pc.c | 16 +- > hw/i386/pc_piix.c | 71 ++--- > hw/i386/pc_q35.c | 16 +- > hw/isa/Kconfig | 10 +- > hw/isa/lpc_ich9.c | 8 + > hw/isa/meson.build | 3 +- > hw/isa/{piix3.c => piix.c} | 302 +++++++++++++++++----- > hw/isa/piix4.c | 327 ------------------------ > hw/mips/Kconfig | 2 + > hw/mips/malta.c | 38 ++- > hw/usb/hcd-uhci.c | 16 +- > hw/usb/hcd-uhci.h | 4 + > include/hw/core/proxy-pic.h | 54 ++++ > include/hw/i386/ich9.h | 2 + > include/hw/i386/pc.h | 2 +- > include/hw/southbridge/piix.h | 30 ++- > 22 files changed, 520 insertions(+), 469 deletions(-) > create mode 100644 hw/core/proxy-pic.c > rename hw/isa/{piix3.c => piix.c} (56%) > delete mode 100644 hw/isa/piix4.c > create mode 100644 include/hw/core/proxy-pic.h > > -- > 2.38.1 >