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From: Roger Quadros <rogerq@kernel.org>
To: dario.binacchi@amarulasolutions.com,
	michael@amarulasolutions.com, m.niestroj@grinn-global.com
Cc: trini@konsulko.com, u-boot@lists.denx.de,
	Roger Quadros <rogerq@kernel.org>
Subject: [u-boot][PATCH v2 3/8] dt-bindings: mtd: Add ti, gpmc-nand DT binding documentation
Date: Tue, 20 Dec 2022 12:21:58 +0200	[thread overview]
Message-ID: <20221220102203.52398-4-rogerq@kernel.org> (raw)
In-Reply-To: <20221220102203.52398-1-rogerq@kernel.org>

Add DT binding documentation for the TI GPMC NAND controller.
This is picked up from the Linux Kernel.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
 .../mtd/ti,gpmc-nand.yaml                     | 129 ++++++++++++++++++
 1 file changed, 129 insertions(+)
 create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml

diff --git a/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml b/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
new file mode 100644
index 00000000000..4ac198814b7
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
@@ -0,0 +1,129 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments GPMC NAND Flash controller.
+
+maintainers:
+  - Tony Lindgren <tony@atomide.com>
+  - Roger Quadros <rogerq@kernel.org>
+
+description:
+  GPMC NAND controller/Flash is represented as a child of the
+  GPMC controller node.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - ti,am64-nand
+          - ti,omap2-nand
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: Interrupt for fifoevent
+      - description: Interrupt for termcount
+
+  "#address-cells": true
+
+  "#size-cells": true
+
+  ti,nand-ecc-opt:
+    description: Desired ECC algorithm
+    $ref: /schemas/types.yaml#/definitions/string
+    enum: [sw, ham1, bch4, bch8, bch16]
+
+  ti,nand-xfer-type:
+    description: Data transfer method between controller and chip.
+    $ref: /schemas/types.yaml#/definitions/string
+    enum: [prefetch-polled, polled, prefetch-dma, prefetch-irq]
+    default: prefetch-polled
+
+  ti,elm-id:
+    description:
+      phandle to the ELM (Error Location Module).
+    $ref: /schemas/types.yaml#/definitions/phandle
+
+  nand-bus-width:
+    description:
+      Bus width to the NAND chip
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [8, 16]
+    default: 8
+
+  rb-gpios:
+    description:
+      GPIO connection to R/B signal from NAND chip
+    maxItems: 1
+
+patternProperties:
+  "@[0-9a-f]+$":
+    $ref: "/schemas/mtd/partitions/partition.yaml"
+
+allOf:
+  - $ref: "/schemas/memory-controllers/ti,gpmc-child.yaml"
+
+required:
+  - compatible
+  - reg
+  - ti,nand-ecc-opt
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/gpio/gpio.h>
+
+    gpmc: memory-controller@50000000 {
+      compatible = "ti,am3352-gpmc";
+      dmas = <&edma 52 0>;
+      dma-names = "rxtx";
+      clocks = <&l3s_gclk>;
+      clock-names = "fck";
+      reg = <0x50000000 0x2000>;
+      interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+      gpmc,num-cs = <7>;
+      gpmc,num-waitpins = <2>;
+      #address-cells = <2>;
+      #size-cells = <1>;
+      interrupt-controller;
+      #interrupt-cells = <2>;
+      gpio-controller;
+      #gpio-cells = <2>;
+
+      ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
+      nand@0,0 {
+        compatible = "ti,omap2-nand";
+        reg = <0 0 4>;          /* device IO registers */
+        interrupt-parent = <&gpmc>;
+        interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+                     <1 IRQ_TYPE_NONE>; /* termcount */
+        ti,nand-xfer-type = "prefetch-dma";
+        ti,nand-ecc-opt = "bch16";
+        ti,elm-id = <&elm>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        /* NAND generic properties */
+        nand-bus-width = <8>;
+        rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
+
+        /* GPMC properties*/
+        gpmc,device-width = <1>;
+
+        partition@0 {
+          label = "NAND.SPL";
+          reg = <0x00000000 0x00040000>;
+        };
+        partition@1 {
+          label = "NAND.SPL.backup1";
+          reg = <0x00040000 0x00040000>;
+        };
+      };
+    };
-- 
2.34.1


  parent reply	other threads:[~2022-12-20 10:22 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-20 10:21 [u-boot][PATCH v2 0/8] rawnand: omap_gpmc: driver model support Roger Quadros
2022-12-20 10:21 ` [u-boot][PATCH v2 1/8] mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction Roger Quadros
2022-12-22 21:47   ` Michael Nazzareno Trimarchi
2022-12-20 10:21 ` [u-boot][PATCH v2 2/8] mtd: rawnand: nand_base: Allow base driver to be used in SPL without nand_bbt Roger Quadros
2022-12-20 10:21 ` Roger Quadros [this message]
2022-12-20 10:21 ` [u-boot][PATCH v2 4/8] mtd: rawnand: omap_gpmc: support u-boot driver model Roger Quadros
2022-12-20 10:22 ` [u-boot][PATCH v2 5/8] mtd: rawnand: omap_gpmc: Add SPL NAND support Roger Quadros
2022-12-20 10:22 ` [u-boot][PATCH v2 6/8] mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC Roger Quadros
2022-12-20 10:22 ` [u-boot][PATCH v2 7/8] dt-bindings: mtd: Add ti, elm DT binding documentation Roger Quadros
2022-12-20 10:22 ` [u-boot][PATCH v2 8/8] mtd: rawnand: omap_elm: u-boot driver model support Roger Quadros
2022-12-21 17:56   ` Michael Nazzareno Trimarchi
2022-12-21 19:57     ` Roger Quadros
2022-12-21 20:08       ` Michael Nazzareno Trimarchi
2022-12-22 21:35         ` Michael Nazzareno Trimarchi
2022-12-23  9:34           ` Roger Quadros
2022-12-23  9:43             ` Michael Nazzareno Trimarchi
2023-01-04  7:27 ` [u-boot][PATCH v2 0/8] rawnand: omap_gpmc: " Dario Binacchi

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