From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A52BC4332F for ; Fri, 23 Dec 2022 12:38:08 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3B1DF854E6; Fri, 23 Dec 2022 13:35:31 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="o9DgANNi"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id AD0D3854D1; Fri, 23 Dec 2022 13:35:23 +0100 (CET) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 90D4F854E6 for ; Fri, 23 Dec 2022 13:35:19 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Sergiu.Moga@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1671798919; x=1703334919; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=friHdf1q0Q38XTXXDBK1zawab41Y68buBYYtJyU6mrE=; b=o9DgANNicQAc41GkmP3uYpQF8tMPSOWkao9E6D4m7AWj4ABGdnMvXFm3 +yeTgLak5MNRO0xDtkPBOl9IVS3qPgxPTGuZPKdCGM5t5Dxm6zqGo9eNN /8RN9OkiY7xAfqHA7YNl/mPS/OPPMQD1vgV1Gb6etEYAMqpt4fXmGDUzY n4qzqsgEu1r6ixo5JlSpMQlg7VaSe2KFfbotkelsg5LAtl3V2Eru95pe7 ifHy9UOb5KFcaf1yCSvBe438MqhQkait29cXcDtvu2N6QX5bJMoiUkro+ 6DNzoi4dv6FM9sPcnbgoh1oo65d3EombpvzYxWxeeLITX5MHKUFQqCQeK Q==; X-IronPort-AV: E=Sophos;i="5.96,268,1665471600"; d="scan'208";a="129497422" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Dec 2022 05:35:17 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 23 Dec 2022 05:35:15 -0700 Received: from ROB-ULT-M68701.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 23 Dec 2022 05:35:12 -0700 From: Sergiu Moga To: , , , , , , , , CC: , Mihai Sain Subject: [PATCH 4/4] usb: ohci-at91: Add USB PHY functionality Date: Fri, 23 Dec 2022 14:34:55 +0200 Message-ID: <20221223123454.362757-5-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221223123454.362757-1-sergiu.moga@microchip.com> References: <20221223123454.362757-1-sergiu.moga@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Add the ability to enable/disable whatever USB PHY's are passed to the AT91 OHCI driver through DT. Signed-off-by: Sergiu Moga Tested-by: Mihai Sain --- drivers/usb/host/ohci-at91.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 5cf8f283e5..217f31b402 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -74,6 +74,10 @@ int usb_cpu_init_fail(void) #include #include "ohci.h" +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) +#include +#endif + #define AT91_MAX_USBH_PORTS 3 #define at91_for_each_port(index) \ @@ -91,6 +95,10 @@ struct ohci_at91_priv { struct clk *fclk; struct clk *hclk; bool clocked; + +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + struct phy phy[AT91_MAX_USBH_PORTS]; +#endif }; static void at91_start_clock(struct ohci_at91_priv *ohci_at91) @@ -98,6 +106,13 @@ static void at91_start_clock(struct ohci_at91_priv *ohci_at91) if (ohci_at91->clocked) return; +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + int i; + + at91_for_each_port(i) + generic_phy_power_on(&ohci_at91->phy[i]); +#endif + clk_set_rate(ohci_at91->fclk, 48000000); clk_prepare_enable(ohci_at91->hclk); clk_prepare_enable(ohci_at91->iclk); @@ -110,6 +125,13 @@ static void at91_stop_clock(struct ohci_at91_priv *ohci_at91) if (!ohci_at91->clocked) return; +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + int i; + + at91_for_each_port(i) + generic_phy_power_off(&ohci_at91->phy[i]); +#endif + clk_disable_unprepare(ohci_at91->fclk); clk_disable_unprepare(ohci_at91->iclk); clk_disable_unprepare(ohci_at91->hclk); @@ -215,6 +237,14 @@ static int ohci_atmel_probe(struct udevice *dev) goto fail; } +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + at91_for_each_port(i) { + generic_phy_get_by_index(dev, i, &ohci_at91->phy[i]); + generic_phy_init(&ohci_at91->phy[i]); + generic_phy_configure(&ohci_at91->phy[i], NULL); + } +#endif + at91_start_hc(dev); return ohci_register(dev, regs); @@ -229,6 +259,7 @@ fail: static const struct udevice_id ohci_usb_ids[] = { { .compatible = "atmel,at91rm9200-ohci", }, + { .compatible = "microchip,sama7g5-ohci", }, { } }; -- 2.34.1