From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A1BFC54EB4 for ; Mon, 23 Jan 2023 15:15:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232383AbjAWPO7 (ORCPT ); Mon, 23 Jan 2023 10:14:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232434AbjAWPOX (ORCPT ); Mon, 23 Jan 2023 10:14:23 -0500 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A39E2940F for ; Mon, 23 Jan 2023 07:13:57 -0800 (PST) Received: by mail-pl1-x62b.google.com with SMTP id c6so11699277pls.4 for ; Mon, 23 Jan 2023 07:13:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M1hJXJQdt5ZCT1mSKIuiHURptg88R24MKTm4kRNQiUQ=; b=O3tW1IzwPy+pXd+6z860JUtYpMiR7mFgXQs6/v8mpMuWvKQ5YMipEZmel5OgELuDxH 2vH855f3BdVdBO+KLuutaTd7k5tQIAbtMGXfIoRs4omdnDjQM40shSOQE+i3ZFSrO7uq 3MWjZDEE3EM2ptjlhE17D2I67c2KhWt4hHthI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M1hJXJQdt5ZCT1mSKIuiHURptg88R24MKTm4kRNQiUQ=; b=6DUXhHVVAmLofyDiNY7hdvcCjoXQ5wZ9eDi46rgacJY+CI0xcMjPJWpyOjbAfts97m Cc27L6e2vZmdl437Aztow05w9FMmgmpZVRPSn+LJgp1QVfwsxMxPqydkg+r2IykjfrVa /3lKIst1cNCFmCBgHNh7vPxf5Oe6wG6onao9+Aldfprvphu4KmwuaTmEEzmPWB4iRaYK zH/LIXlsWYISald9Wcl+uOjxOLjZvAZMOfI7Rlij1lCE6VWVptOyzAQvqWouv22mGpV0 PIj82XzJe5UZCykMgmioDQ7zGn1TElDwpLrQGfStg/Kicg4xLNzp0sxRs1FHl3jcyOrq IiiQ== X-Gm-Message-State: AFqh2kp+oAEDE+ggC99sw56xSAdu6/3GoNoF9oOUd0tHC85D3aIizwFL sSeI7BjJ9f69SsG86Vly9HpxjA== X-Google-Smtp-Source: AMrXdXs6LCi1WTkUN0zffk3jV0ED06YVEWEpCsymLgZJLxCCm1G+wm+RviRE25+QBU5GGXxHipnyUg== X-Received: by 2002:a17:902:c3c6:b0:192:c014:f6ba with SMTP id j6-20020a170902c3c600b00192c014f6bamr24929553plj.33.1674486836050; Mon, 23 Jan 2023 07:13:56 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a15f:2279:f361:f93b:7971]) by smtp.gmail.com with ESMTPSA id d5-20020a170903230500b001754fa42065sm19207111plh.143.2023.01.23.07.13.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:13:55 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [RESEND PATCH v11 12/18] drm: exynos: dsi: Consolidate component and bridge Date: Mon, 23 Jan 2023 20:42:06 +0530 Message-Id: <20230123151212.269082-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230123151212.269082-1-jagan@amarulasolutions.com> References: <20230123151212.269082-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org DSI host registration, attach and detach operations are quite different for the component and bridge-based DRM drivers.  Supporting generic bridge driver to use both component and bridge based DRM drivers can be tricky and would require additional host related operation hooks. Add host operation hooks for registering and unregistering Exynos and generic drivers, where Exynos hooks are used in existing Exynos component based DRM drivers and generic hooks are used in i.MX8M bridge based DRM drivers.  Add host attach and detach operation hooks for Exynos component DRM drivers and those get invoked while DSI core host attach and detach gets called. Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v11: - none Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 179 ++++++++++++++++++------ 1 file changed, 140 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7afbbe30d1d3..fc7f00ab01b4 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -250,6 +250,8 @@ struct exynos_dsi_transfer { u16 rx_done; }; +struct exynos_dsi; + #define DSIM_STATE_ENABLED BIT(0) #define DSIM_STATE_INITIALIZED BIT(1) #define DSIM_STATE_CMD_LPM BIT(2) @@ -281,12 +283,19 @@ struct exynos_dsi_driver_data { const unsigned int *reg_values; }; +struct exynos_dsim_host_ops { + int (*register_host)(struct exynos_dsi *dsim); + void (*unregister_host)(struct exynos_dsi *dsim); + int (*attach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); + int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); +}; + struct exynos_dsi_plat_data { enum exynos_dsi_type hw_type; + const struct exynos_dsim_host_ops *host_ops; }; struct exynos_dsi { - struct drm_encoder encoder; struct mipi_dsi_host dsi_host; struct drm_bridge bridge; struct drm_bridge *out_bridge; @@ -316,6 +325,12 @@ struct exynos_dsi { const struct exynos_dsi_driver_data *driver_data; const struct exynos_dsi_plat_data *plat_data; + + void *priv; +}; + +struct exynos_dsi_enc { + struct drm_encoder encoder; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -1319,10 +1334,11 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) { - struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; + struct exynos_dsi *dsim = (struct exynos_dsi *)dev_id; + struct exynos_dsi_enc *dsi = dsim->priv; struct drm_encoder *encoder = &dsi->encoder; - if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) + if (dsim->state & DSIM_STATE_VIDOUT_AVAILABLE) exynos_drm_crtc_te_handler(encoder->crtc); return IRQ_HANDLED; @@ -1595,9 +1611,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; struct device *dev = dsi->dev; - struct drm_encoder *encoder = &dsi->encoder; - struct drm_device *drm = encoder->dev; int ret; dsi->out_bridge = devm_drm_of_dsi_get_bridge(dev, dev->of_node, 1, 0); @@ -1611,35 +1626,15 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, drm_bridge_add(&dsi->bridge); - drm_bridge_attach(encoder, &dsi->bridge, - list_first_entry_or_null(&encoder->bridge_chain, - struct drm_bridge, - chain_node), 0); - - /* - * This is a temporary solution and should be made by more generic way. - * - * If attached panel device is for command mode one, dsi should register - * TE interrupt handler. - */ - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { - ret = exynos_dsi_register_te_irq(dsi, &device->dev); - if (ret) + if (pdata->host_ops && pdata->host_ops->attach) { + ret = pdata->host_ops->attach(dsi, device); + if (ret < 0) return ret; } - mutex_lock(&drm->mode_config.mutex); - dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); - - mutex_unlock(&drm->mode_config.mutex); - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); return 0; } @@ -1648,12 +1643,14 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); - struct drm_device *drm = dsi->encoder.dev; - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; + int ret; - exynos_dsi_unregister_te_irq(dsi); + if (pdata->host_ops && pdata->host_ops->detach) { + ret = pdata->host_ops->detach(dsi, device); + if (ret < 0) + return ret; + } drm_bridge_remove(&dsi->bridge); @@ -1727,10 +1724,66 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) return 0; } +static int _exynos_dsi_host_attach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi = dsim->priv; + struct drm_encoder *encoder = &dsi->encoder; + struct drm_device *drm = encoder->dev; + int ret; + + drm_bridge_attach(encoder, &dsim->bridge, + list_first_entry_or_null(&encoder->bridge_chain, + struct drm_bridge, + chain_node), 0); + + /* + * This is a temporary solution and should be made by more generic way. + * + * If attached panel device is for command mode one, dsi should register + * TE interrupt handler. + */ + if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { + ret = exynos_dsi_register_te_irq(dsim, &device->dev); + if (ret) + return ret; + } + + mutex_lock(&drm->mode_config.mutex); + + dsim->lanes = device->lanes; + dsim->format = device->format; + dsim->mode_flags = device->mode_flags; + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = + !(dsim->mode_flags & MIPI_DSI_MODE_VIDEO); + + mutex_unlock(&drm->mode_config.mutex); + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + return 0; +} + +static int _exynos_dsi_host_detach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi = dsim->priv; + struct drm_device *drm = dsi->encoder.dev; + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + exynos_dsi_unregister_te_irq(dsim); + + return 0; +} + static int exynos_dsi_bind(struct device *dev, struct device *master, void *data) { - struct exynos_dsi *dsi = dev_get_drvdata(dev); + struct exynos_dsi *dsim = dev_get_drvdata(dev); + struct exynos_dsi_enc *dsi = dsim->priv; struct drm_encoder *encoder = &dsi->encoder; struct drm_device *drm_dev = data; int ret; @@ -1741,17 +1794,17 @@ static int exynos_dsi_bind(struct device *dev, struct device *master, if (ret < 0) return ret; - return mipi_dsi_host_register(&dsi->dsi_host); + return mipi_dsi_host_register(&dsim->dsi_host); } static void exynos_dsi_unbind(struct device *dev, struct device *master, void *data) { - struct exynos_dsi *dsi = dev_get_drvdata(dev); + struct exynos_dsi *dsim = dev_get_drvdata(dev); - exynos_dsi_atomic_disable(&dsi->bridge, NULL); + dsim->bridge.funcs->atomic_disable(&dsim->bridge, NULL); - mipi_dsi_host_unregister(&dsi->dsi_host); + mipi_dsi_host_unregister(&dsim->dsi_host); } static const struct component_ops exynos_dsi_component_ops = { @@ -1759,6 +1812,40 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static int exynos_dsi_register_host(struct exynos_dsi *dsim) +{ + struct exynos_dsi_enc *dsi; + + dsi = devm_kzalloc(dsim->dev, sizeof(*dsi), GFP_KERNEL); + if (!dsi) + return -ENOMEM; + + dsim->priv = dsi; + dsim->bridge.pre_enable_prev_first = true; + + return component_add(dsim->dev, &exynos_dsi_component_ops); +} + +static void exynos_dsi_unregister_host(struct exynos_dsi *dsim) +{ + component_del(dsim->dev, &exynos_dsi_component_ops); +} + +static int generic_dsim_register_host(struct exynos_dsi *dsim) +{ + return mipi_dsi_host_register(&dsim->dsi_host); +} + +static void generic_dsim_unregister_host(struct exynos_dsi *dsim) +{ + mipi_dsi_host_unregister(&dsim->dsi_host); +} + +static const struct exynos_dsim_host_ops generic_dsim_host_ops = { + .register_host = generic_dsim_register_host, + .unregister_host = generic_dsim_unregister_host, +}; + static const struct drm_bridge_timings dsim_bridge_timings_de_low = { .input_bus_flags = DRM_BUS_FLAG_DE_LOW, }; @@ -1853,7 +1940,9 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) dsi->bridge.timings = &dsim_bridge_timings_de_low; - ret = component_add(dev, &exynos_dsi_component_ops); + if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host) + ret = dsi->plat_data->host_ops->register_host(dsi); + if (ret) goto err_disable_runtime; @@ -1944,24 +2033,36 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { + .register_host = exynos_dsi_register_host, + .unregister_host = exynos_dsi_unregister_host, + .attach = _exynos_dsi_host_attach, + .detach = _exynos_dsi_host_detach, +}; + static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS3250, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos4210_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS4210, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5410_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5410, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5422_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5422, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5433_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5433, + .host_ops = &exynos_dsi_host_ops, }; static const struct of_device_id exynos_dsi_of_match[] = { -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7EFA8C38142 for ; Mon, 23 Jan 2023 15:23:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UAKtLfkmQlajw/rKFaHmTjYJy5nAipQK+i7CuSM/zTA=; b=GerWPogUflVRAl lsQZ2tFueI/bMDTO6gcqUoE8UhoJXdegAdQGaPZNTqCkBZicc1DyhbF8giJfnl0/axAKJg7Yj0jDC VY7RfD0FdPwfzibP2920isW+FQvr3tQGDL/7QWJ2jgJZ36mL5rUMSAc/Amd7oYHSQbmZ5ZpARxV7y qU0amSpiIb3y3/g8U0MWmBWIjkuRC5I1YPJ9/gRF6UkoTvrJh9P1J2ebQn+yAlxFJW976X55dtqhm 7et1EEFuDgjrnnWxBvaGtH31cVwhHFUh7kwP1jWhPKpxY5Zwm31DRBtdmemWkaCdfqYOBMKmgjpK8 qEPBPSROxAU3yqLdpkwA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJye4-0009Y6-GY; Mon, 23 Jan 2023 15:22:05 +0000 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJyWC-0005m2-LZ for linux-arm-kernel@lists.infradead.org; Mon, 23 Jan 2023 15:13:59 +0000 Received: by mail-pl1-x631.google.com with SMTP id 5so6378026plo.3 for ; Mon, 23 Jan 2023 07:13:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M1hJXJQdt5ZCT1mSKIuiHURptg88R24MKTm4kRNQiUQ=; b=O3tW1IzwPy+pXd+6z860JUtYpMiR7mFgXQs6/v8mpMuWvKQ5YMipEZmel5OgELuDxH 2vH855f3BdVdBO+KLuutaTd7k5tQIAbtMGXfIoRs4omdnDjQM40shSOQE+i3ZFSrO7uq 3MWjZDEE3EM2ptjlhE17D2I67c2KhWt4hHthI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M1hJXJQdt5ZCT1mSKIuiHURptg88R24MKTm4kRNQiUQ=; b=v/quCIh0hFR5EcOPHbxzE6jk2hi+dLq5320VIzO7LanAW69GClfg2z1Z1rHFBFmbgw tttiX6dAQ8oI+2aKiKaNMBCCJqE17Dm9wpAC4YkGYqyct8SLhIC7+eiRHNTmp9xI8U++ A1KsZ4QWNDaHvJkNVR3CPA/xQLF7oz2RA4TSZ1JlBoahYUWR28S1BMfsRosh8I8hR3i/ hrhs2Xy+aXsKPR5Q5RmUvPHQbUS8Ts1ePNKVJO6w1VfX8j3uMuve3UFrHY1oWl7q0nwF mk5VEiYNrnsgT1HkD3vNyjmK7nVLkja1lNWsdxGBcoeoaBWorNqExQfVY0+96Aq927ZM 7DeQ== X-Gm-Message-State: AFqh2kq0+wnOCtjgpDWB/NTCc7lpp0mFZfPwMRJ1QXkByJl4VEofsxZo +yutCjBeIuL2rpuXvfyjVQv5rQ== X-Google-Smtp-Source: AMrXdXs6LCi1WTkUN0zffk3jV0ED06YVEWEpCsymLgZJLxCCm1G+wm+RviRE25+QBU5GGXxHipnyUg== X-Received: by 2002:a17:902:c3c6:b0:192:c014:f6ba with SMTP id j6-20020a170902c3c600b00192c014f6bamr24929553plj.33.1674486836050; Mon, 23 Jan 2023 07:13:56 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a15f:2279:f361:f93b:7971]) by smtp.gmail.com with ESMTPSA id d5-20020a170903230500b001754fa42065sm19207111plh.143.2023.01.23.07.13.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:13:55 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [RESEND PATCH v11 12/18] drm: exynos: dsi: Consolidate component and bridge Date: Mon, 23 Jan 2023 20:42:06 +0530 Message-Id: <20230123151212.269082-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230123151212.269082-1-jagan@amarulasolutions.com> References: <20230123151212.269082-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230123_071356_748273_DEA05E77 X-CRM114-Status: GOOD ( 24.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RFNJIGhvc3QgcmVnaXN0cmF0aW9uLCBhdHRhY2ggYW5kIGRldGFjaCBvcGVyYXRpb25zIGFyZSBx dWl0ZQpkaWZmZXJlbnQgZm9yIHRoZSBjb21wb25lbnQgYW5kIGJyaWRnZS1iYXNlZCBEUk0gZHJp dmVycy7CoAoKU3VwcG9ydGluZyBnZW5lcmljIGJyaWRnZSBkcml2ZXIgdG8gdXNlIGJvdGggY29t cG9uZW50wqBhbmQgYnJpZGdlCmJhc2VkIERSTSBkcml2ZXJzIGNhbiBiZSB0cmlja3kgYW5kIHdv dWxkIHJlcXVpcmUgYWRkaXRpb25hbCBob3N0CnJlbGF0ZWQgb3BlcmF0aW9uIGhvb2tzLgoKQWRk IGhvc3Qgb3BlcmF0aW9uIGhvb2tzIGZvciByZWdpc3RlcmluZyBhbmQgdW5yZWdpc3RlcmluZyBF eHlub3MKYW5kIGdlbmVyaWMgZHJpdmVycywgd2hlcmUgRXh5bm9zIGhvb2tzIGFyZSB1c2VkIGlu IGV4aXN0aW5nIEV4eW5vcwpjb21wb25lbnTCoGJhc2VkIERSTSBkcml2ZXJzIGFuZCBnZW5lcmlj IGhvb2tzIGFyZSB1c2VkIGluIGkuTVg4TQpicmlkZ2UgYmFzZWQgRFJNIGRyaXZlcnMuwqAKCkFk ZCBob3N0IGF0dGFjaCBhbmQgZGV0YWNoIG9wZXJhdGlvbiBob29rcyBmb3IgRXh5bm9zIGNvbXBv bmVudApEUk0gZHJpdmVycyBhbmQgdGhvc2UgZ2V0IGludm9rZWQgd2hpbGUgRFNJIGNvcmUgaG9z dCBhdHRhY2ggYW5kCmRldGFjaCBnZXRzIGNhbGxlZC4KClNpZ25lZC1vZmYtYnk6IE1hcmVrIFN6 eXByb3dza2kgPG0uc3p5cHJvd3NraUBzYW1zdW5nLmNvbT4KU2lnbmVkLW9mZi1ieTogSmFnYW4g VGVraSA8amFnYW5AYW1hcnVsYXNvbHV0aW9ucy5jb20+Ci0tLQpDaGFuZ2VzIGZvciB2MTE6Ci0g bm9uZQpDaGFuZ2VzIGZvciB2MTA6Ci0gc3BsaXQgZnJvbSBwcmV2aW91cyBzZXJpZXMgcGF0Y2gK ImRybTogYnJpZGdlOiBHZW5lcmFsaXplIEV4eW5vcy1EU0kgZHJpdmVyIGludG8gYSBTYW1zdW5n IERTSU0gYnJpZGdlIgoKIGRyaXZlcnMvZ3B1L2RybS9leHlub3MvZXh5bm9zX2RybV9kc2kuYyB8 IDE3OSArKysrKysrKysrKysrKysrKystLS0tLS0KIDEgZmlsZSBjaGFuZ2VkLCAxNDAgaW5zZXJ0 aW9ucygrKSwgMzkgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2V4 eW5vcy9leHlub3NfZHJtX2RzaS5jIGIvZHJpdmVycy9ncHUvZHJtL2V4eW5vcy9leHlub3NfZHJt X2RzaS5jCmluZGV4IDdhZmJiZTMwZDFkMy4uZmM3ZjAwYWIwMWI0IDEwMDY0NAotLS0gYS9kcml2 ZXJzL2dwdS9kcm0vZXh5bm9zL2V4eW5vc19kcm1fZHNpLmMKKysrIGIvZHJpdmVycy9ncHUvZHJt L2V4eW5vcy9leHlub3NfZHJtX2RzaS5jCkBAIC0yNTAsNiArMjUwLDggQEAgc3RydWN0IGV4eW5v c19kc2lfdHJhbnNmZXIgewogCXUxNiByeF9kb25lOwogfTsKIAorc3RydWN0IGV4eW5vc19kc2k7 CisKICNkZWZpbmUgRFNJTV9TVEFURV9FTkFCTEVECQlCSVQoMCkKICNkZWZpbmUgRFNJTV9TVEFU RV9JTklUSUFMSVpFRAkJQklUKDEpCiAjZGVmaW5lIERTSU1fU1RBVEVfQ01EX0xQTQkJQklUKDIp CkBAIC0yODEsMTIgKzI4MywxOSBAQCBzdHJ1Y3QgZXh5bm9zX2RzaV9kcml2ZXJfZGF0YSB7CiAJ Y29uc3QgdW5zaWduZWQgaW50ICpyZWdfdmFsdWVzOwogfTsKIAorc3RydWN0IGV4eW5vc19kc2lt X2hvc3Rfb3BzIHsKKwlpbnQgKCpyZWdpc3Rlcl9ob3N0KShzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNp bSk7CisJdm9pZCAoKnVucmVnaXN0ZXJfaG9zdCkoc3RydWN0IGV4eW5vc19kc2kgKmRzaW0pOwor CWludCAoKmF0dGFjaCkoc3RydWN0IGV4eW5vc19kc2kgKmRzaW0sIHN0cnVjdCBtaXBpX2RzaV9k ZXZpY2UgKmRldmljZSk7CisJaW50ICgqZGV0YWNoKShzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpbSwg c3RydWN0IG1pcGlfZHNpX2RldmljZSAqZGV2aWNlKTsKK307CisKIHN0cnVjdCBleHlub3NfZHNp X3BsYXRfZGF0YSB7CiAJZW51bSBleHlub3NfZHNpX3R5cGUgaHdfdHlwZTsKKwljb25zdCBzdHJ1 Y3QgZXh5bm9zX2RzaW1faG9zdF9vcHMgKmhvc3Rfb3BzOwogfTsKIAogc3RydWN0IGV4eW5vc19k c2kgewotCXN0cnVjdCBkcm1fZW5jb2RlciBlbmNvZGVyOwogCXN0cnVjdCBtaXBpX2RzaV9ob3N0 IGRzaV9ob3N0OwogCXN0cnVjdCBkcm1fYnJpZGdlIGJyaWRnZTsKIAlzdHJ1Y3QgZHJtX2JyaWRn ZSAqb3V0X2JyaWRnZTsKQEAgLTMxNiw2ICszMjUsMTIgQEAgc3RydWN0IGV4eW5vc19kc2kgewog CiAJY29uc3Qgc3RydWN0IGV4eW5vc19kc2lfZHJpdmVyX2RhdGEgKmRyaXZlcl9kYXRhOwogCWNv bnN0IHN0cnVjdCBleHlub3NfZHNpX3BsYXRfZGF0YSAqcGxhdF9kYXRhOworCisJdm9pZCAqcHJp djsKK307CisKK3N0cnVjdCBleHlub3NfZHNpX2VuYyB7CisJc3RydWN0IGRybV9lbmNvZGVyIGVu Y29kZXI7CiB9OwogCiAjZGVmaW5lIGhvc3RfdG9fZHNpKGhvc3QpIGNvbnRhaW5lcl9vZihob3N0 LCBzdHJ1Y3QgZXh5bm9zX2RzaSwgZHNpX2hvc3QpCkBAIC0xMzE5LDEwICsxMzM0LDExIEBAIHN0 YXRpYyBpcnFyZXR1cm5fdCBleHlub3NfZHNpX2lycShpbnQgaXJxLCB2b2lkICpkZXZfaWQpCiAK IHN0YXRpYyBpcnFyZXR1cm5fdCBleHlub3NfZHNpX3RlX2lycV9oYW5kbGVyKGludCBpcnEsIHZv aWQgKmRldl9pZCkKIHsKLQlzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpID0gKHN0cnVjdCBleHlub3Nf ZHNpICopZGV2X2lkOworCXN0cnVjdCBleHlub3NfZHNpICpkc2ltID0gKHN0cnVjdCBleHlub3Nf ZHNpICopZGV2X2lkOworCXN0cnVjdCBleHlub3NfZHNpX2VuYyAqZHNpID0gZHNpbS0+cHJpdjsK IAlzdHJ1Y3QgZHJtX2VuY29kZXIgKmVuY29kZXIgPSAmZHNpLT5lbmNvZGVyOwogCi0JaWYgKGRz aS0+c3RhdGUgJiBEU0lNX1NUQVRFX1ZJRE9VVF9BVkFJTEFCTEUpCisJaWYgKGRzaW0tPnN0YXRl ICYgRFNJTV9TVEFURV9WSURPVVRfQVZBSUxBQkxFKQogCQlleHlub3NfZHJtX2NydGNfdGVfaGFu ZGxlcihlbmNvZGVyLT5jcnRjKTsKIAogCXJldHVybiBJUlFfSEFORExFRDsKQEAgLTE1OTUsOSAr MTYxMSw4IEBAIHN0YXRpYyBpbnQgZXh5bm9zX2RzaV9ob3N0X2F0dGFjaChzdHJ1Y3QgbWlwaV9k c2lfaG9zdCAqaG9zdCwKIAkJCQkgIHN0cnVjdCBtaXBpX2RzaV9kZXZpY2UgKmRldmljZSkKIHsK IAlzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpID0gaG9zdF90b19kc2koaG9zdCk7CisJY29uc3Qgc3Ry dWN0IGV4eW5vc19kc2lfcGxhdF9kYXRhICpwZGF0YSA9IGRzaS0+cGxhdF9kYXRhOwogCXN0cnVj dCBkZXZpY2UgKmRldiA9IGRzaS0+ZGV2OwotCXN0cnVjdCBkcm1fZW5jb2RlciAqZW5jb2RlciA9 ICZkc2ktPmVuY29kZXI7Ci0Jc3RydWN0IGRybV9kZXZpY2UgKmRybSA9IGVuY29kZXItPmRldjsK IAlpbnQgcmV0OwogCiAJZHNpLT5vdXRfYnJpZGdlID0gZGV2bV9kcm1fb2ZfZHNpX2dldF9icmlk Z2UoZGV2LCBkZXYtPm9mX25vZGUsIDEsIDApOwpAQCAtMTYxMSwzNSArMTYyNiwxNSBAQCBzdGF0 aWMgaW50IGV4eW5vc19kc2lfaG9zdF9hdHRhY2goc3RydWN0IG1pcGlfZHNpX2hvc3QgKmhvc3Qs CiAKIAlkcm1fYnJpZGdlX2FkZCgmZHNpLT5icmlkZ2UpOwogCi0JZHJtX2JyaWRnZV9hdHRhY2go ZW5jb2RlciwgJmRzaS0+YnJpZGdlLAotCQkJICBsaXN0X2ZpcnN0X2VudHJ5X29yX251bGwoJmVu Y29kZXItPmJyaWRnZV9jaGFpbiwKLQkJCQkJCSAgIHN0cnVjdCBkcm1fYnJpZGdlLAotCQkJCQkJ ICAgY2hhaW5fbm9kZSksIDApOwotCi0JLyoKLQkgKiBUaGlzIGlzIGEgdGVtcG9yYXJ5IHNvbHV0 aW9uIGFuZCBzaG91bGQgYmUgbWFkZSBieSBtb3JlIGdlbmVyaWMgd2F5LgotCSAqCi0JICogSWYg YXR0YWNoZWQgcGFuZWwgZGV2aWNlIGlzIGZvciBjb21tYW5kIG1vZGUgb25lLCBkc2kgc2hvdWxk IHJlZ2lzdGVyCi0JICogVEUgaW50ZXJydXB0IGhhbmRsZXIuCi0JICovCi0JaWYgKCEoZGV2aWNl LT5tb2RlX2ZsYWdzICYgTUlQSV9EU0lfTU9ERV9WSURFTykpIHsKLQkJcmV0ID0gZXh5bm9zX2Rz aV9yZWdpc3Rlcl90ZV9pcnEoZHNpLCAmZGV2aWNlLT5kZXYpOwotCQlpZiAocmV0KQorCWlmIChw ZGF0YS0+aG9zdF9vcHMgJiYgcGRhdGEtPmhvc3Rfb3BzLT5hdHRhY2gpIHsKKwkJcmV0ID0gcGRh dGEtPmhvc3Rfb3BzLT5hdHRhY2goZHNpLCBkZXZpY2UpOworCQlpZiAocmV0IDwgMCkKIAkJCXJl dHVybiByZXQ7CiAJfQogCi0JbXV0ZXhfbG9jaygmZHJtLT5tb2RlX2NvbmZpZy5tdXRleCk7Ci0K IAlkc2ktPmxhbmVzID0gZGV2aWNlLT5sYW5lczsKIAlkc2ktPmZvcm1hdCA9IGRldmljZS0+Zm9y bWF0OwogCWRzaS0+bW9kZV9mbGFncyA9IGRldmljZS0+bW9kZV9mbGFnczsKLQlleHlub3NfZHJt X2NydGNfZ2V0X2J5X3R5cGUoZHJtLCBFWFlOT1NfRElTUExBWV9UWVBFX0xDRCktPmk4MF9tb2Rl ID0KLQkJCSEoZHNpLT5tb2RlX2ZsYWdzICYgTUlQSV9EU0lfTU9ERV9WSURFTyk7Ci0KLQltdXRl eF91bmxvY2soJmRybS0+bW9kZV9jb25maWcubXV0ZXgpOwotCi0JaWYgKGRybS0+bW9kZV9jb25m aWcucG9sbF9lbmFibGVkKQotCQlkcm1fa21zX2hlbHBlcl9ob3RwbHVnX2V2ZW50KGRybSk7CiAK IAlyZXR1cm4gMDsKIH0KQEAgLTE2NDgsMTIgKzE2NDMsMTQgQEAgc3RhdGljIGludCBleHlub3Nf ZHNpX2hvc3RfZGV0YWNoKHN0cnVjdCBtaXBpX2RzaV9ob3N0ICpob3N0LAogCQkJCSAgc3RydWN0 IG1pcGlfZHNpX2RldmljZSAqZGV2aWNlKQogewogCXN0cnVjdCBleHlub3NfZHNpICpkc2kgPSBo b3N0X3RvX2RzaShob3N0KTsKLQlzdHJ1Y3QgZHJtX2RldmljZSAqZHJtID0gZHNpLT5lbmNvZGVy LmRldjsKLQotCWlmIChkcm0tPm1vZGVfY29uZmlnLnBvbGxfZW5hYmxlZCkKLQkJZHJtX2ttc19o ZWxwZXJfaG90cGx1Z19ldmVudChkcm0pOworCWNvbnN0IHN0cnVjdCBleHlub3NfZHNpX3BsYXRf ZGF0YSAqcGRhdGEgPSBkc2ktPnBsYXRfZGF0YTsKKwlpbnQgcmV0OwogCi0JZXh5bm9zX2RzaV91 bnJlZ2lzdGVyX3RlX2lycShkc2kpOworCWlmIChwZGF0YS0+aG9zdF9vcHMgJiYgcGRhdGEtPmhv c3Rfb3BzLT5kZXRhY2gpIHsKKwkJcmV0ID0gcGRhdGEtPmhvc3Rfb3BzLT5kZXRhY2goZHNpLCBk ZXZpY2UpOworCQlpZiAocmV0IDwgMCkKKwkJCXJldHVybiByZXQ7CisJfQogCiAJZHJtX2JyaWRn ZV9yZW1vdmUoJmRzaS0+YnJpZGdlKTsKIApAQCAtMTcyNywxMCArMTcyNCw2NiBAQCBzdGF0aWMg aW50IGV4eW5vc19kc2lfcGFyc2VfZHQoc3RydWN0IGV4eW5vc19kc2kgKmRzaSkKIAlyZXR1cm4g MDsKIH0KIAorc3RhdGljIGludCBfZXh5bm9zX2RzaV9ob3N0X2F0dGFjaChzdHJ1Y3QgZXh5bm9z X2RzaSAqZHNpbSwKKwkJCQkgICBzdHJ1Y3QgbWlwaV9kc2lfZGV2aWNlICpkZXZpY2UpCit7CisJ c3RydWN0IGV4eW5vc19kc2lfZW5jICpkc2kgPSBkc2ltLT5wcml2OworCXN0cnVjdCBkcm1fZW5j b2RlciAqZW5jb2RlciA9ICZkc2ktPmVuY29kZXI7CisJc3RydWN0IGRybV9kZXZpY2UgKmRybSA9 IGVuY29kZXItPmRldjsKKwlpbnQgcmV0OworCisJZHJtX2JyaWRnZV9hdHRhY2goZW5jb2Rlciwg JmRzaW0tPmJyaWRnZSwKKwkJCSAgbGlzdF9maXJzdF9lbnRyeV9vcl9udWxsKCZlbmNvZGVyLT5i cmlkZ2VfY2hhaW4sCisJCQkJCQkgICBzdHJ1Y3QgZHJtX2JyaWRnZSwKKwkJCQkJCSAgIGNoYWlu X25vZGUpLCAwKTsKKworCS8qCisJICogVGhpcyBpcyBhIHRlbXBvcmFyeSBzb2x1dGlvbiBhbmQg c2hvdWxkIGJlIG1hZGUgYnkgbW9yZSBnZW5lcmljIHdheS4KKwkgKgorCSAqIElmIGF0dGFjaGVk IHBhbmVsIGRldmljZSBpcyBmb3IgY29tbWFuZCBtb2RlIG9uZSwgZHNpIHNob3VsZCByZWdpc3Rl cgorCSAqIFRFIGludGVycnVwdCBoYW5kbGVyLgorCSAqLworCWlmICghKGRldmljZS0+bW9kZV9m bGFncyAmIE1JUElfRFNJX01PREVfVklERU8pKSB7CisJCXJldCA9IGV4eW5vc19kc2lfcmVnaXN0 ZXJfdGVfaXJxKGRzaW0sICZkZXZpY2UtPmRldik7CisJCWlmIChyZXQpCisJCQlyZXR1cm4gcmV0 OworCX0KKworCW11dGV4X2xvY2soJmRybS0+bW9kZV9jb25maWcubXV0ZXgpOworCisJZHNpbS0+ bGFuZXMgPSBkZXZpY2UtPmxhbmVzOworCWRzaW0tPmZvcm1hdCA9IGRldmljZS0+Zm9ybWF0Owor CWRzaW0tPm1vZGVfZmxhZ3MgPSBkZXZpY2UtPm1vZGVfZmxhZ3M7CisJZXh5bm9zX2RybV9jcnRj X2dldF9ieV90eXBlKGRybSwgRVhZTk9TX0RJU1BMQVlfVFlQRV9MQ0QpLT5pODBfbW9kZSA9CisJ CQkhKGRzaW0tPm1vZGVfZmxhZ3MgJiBNSVBJX0RTSV9NT0RFX1ZJREVPKTsKKworCW11dGV4X3Vu bG9jaygmZHJtLT5tb2RlX2NvbmZpZy5tdXRleCk7CisKKwlpZiAoZHJtLT5tb2RlX2NvbmZpZy5w b2xsX2VuYWJsZWQpCisJCWRybV9rbXNfaGVscGVyX2hvdHBsdWdfZXZlbnQoZHJtKTsKKworCXJl dHVybiAwOworfQorCitzdGF0aWMgaW50IF9leHlub3NfZHNpX2hvc3RfZGV0YWNoKHN0cnVjdCBl eHlub3NfZHNpICpkc2ltLAorCQkJCSAgIHN0cnVjdCBtaXBpX2RzaV9kZXZpY2UgKmRldmljZSkK K3sKKwlzdHJ1Y3QgZXh5bm9zX2RzaV9lbmMgKmRzaSA9IGRzaW0tPnByaXY7CisJc3RydWN0IGRy bV9kZXZpY2UgKmRybSA9IGRzaS0+ZW5jb2Rlci5kZXY7CisKKwlpZiAoZHJtLT5tb2RlX2NvbmZp Zy5wb2xsX2VuYWJsZWQpCisJCWRybV9rbXNfaGVscGVyX2hvdHBsdWdfZXZlbnQoZHJtKTsKKwor CWV4eW5vc19kc2lfdW5yZWdpc3Rlcl90ZV9pcnEoZHNpbSk7CisKKwlyZXR1cm4gMDsKK30KKwog c3RhdGljIGludCBleHlub3NfZHNpX2JpbmQoc3RydWN0IGRldmljZSAqZGV2LCBzdHJ1Y3QgZGV2 aWNlICptYXN0ZXIsCiAJCQkJdm9pZCAqZGF0YSkKIHsKLQlzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNp ID0gZGV2X2dldF9kcnZkYXRhKGRldik7CisJc3RydWN0IGV4eW5vc19kc2kgKmRzaW0gPSBkZXZf Z2V0X2RydmRhdGEoZGV2KTsKKwlzdHJ1Y3QgZXh5bm9zX2RzaV9lbmMgKmRzaSA9IGRzaW0tPnBy aXY7CiAJc3RydWN0IGRybV9lbmNvZGVyICplbmNvZGVyID0gJmRzaS0+ZW5jb2RlcjsKIAlzdHJ1 Y3QgZHJtX2RldmljZSAqZHJtX2RldiA9IGRhdGE7CiAJaW50IHJldDsKQEAgLTE3NDEsMTcgKzE3 OTQsMTcgQEAgc3RhdGljIGludCBleHlub3NfZHNpX2JpbmQoc3RydWN0IGRldmljZSAqZGV2LCBz dHJ1Y3QgZGV2aWNlICptYXN0ZXIsCiAJaWYgKHJldCA8IDApCiAJCXJldHVybiByZXQ7CiAKLQly ZXR1cm4gbWlwaV9kc2lfaG9zdF9yZWdpc3RlcigmZHNpLT5kc2lfaG9zdCk7CisJcmV0dXJuIG1p cGlfZHNpX2hvc3RfcmVnaXN0ZXIoJmRzaW0tPmRzaV9ob3N0KTsKIH0KIAogc3RhdGljIHZvaWQg ZXh5bm9zX2RzaV91bmJpbmQoc3RydWN0IGRldmljZSAqZGV2LCBzdHJ1Y3QgZGV2aWNlICptYXN0 ZXIsCiAJCQkJdm9pZCAqZGF0YSkKIHsKLQlzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpID0gZGV2X2dl dF9kcnZkYXRhKGRldik7CisJc3RydWN0IGV4eW5vc19kc2kgKmRzaW0gPSBkZXZfZ2V0X2RydmRh dGEoZGV2KTsKIAotCWV4eW5vc19kc2lfYXRvbWljX2Rpc2FibGUoJmRzaS0+YnJpZGdlLCBOVUxM KTsKKwlkc2ltLT5icmlkZ2UuZnVuY3MtPmF0b21pY19kaXNhYmxlKCZkc2ltLT5icmlkZ2UsIE5V TEwpOwogCi0JbWlwaV9kc2lfaG9zdF91bnJlZ2lzdGVyKCZkc2ktPmRzaV9ob3N0KTsKKwltaXBp X2RzaV9ob3N0X3VucmVnaXN0ZXIoJmRzaW0tPmRzaV9ob3N0KTsKIH0KIAogc3RhdGljIGNvbnN0 IHN0cnVjdCBjb21wb25lbnRfb3BzIGV4eW5vc19kc2lfY29tcG9uZW50X29wcyA9IHsKQEAgLTE3 NTksNiArMTgxMiw0MCBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNvbXBvbmVudF9vcHMgZXh5bm9z X2RzaV9jb21wb25lbnRfb3BzID0gewogCS51bmJpbmQJPSBleHlub3NfZHNpX3VuYmluZCwKIH07 CiAKK3N0YXRpYyBpbnQgZXh5bm9zX2RzaV9yZWdpc3Rlcl9ob3N0KHN0cnVjdCBleHlub3NfZHNp ICpkc2ltKQoreworCXN0cnVjdCBleHlub3NfZHNpX2VuYyAqZHNpOworCisJZHNpID0gZGV2bV9r emFsbG9jKGRzaW0tPmRldiwgc2l6ZW9mKCpkc2kpLCBHRlBfS0VSTkVMKTsKKwlpZiAoIWRzaSkK KwkJcmV0dXJuIC1FTk9NRU07CisKKwlkc2ltLT5wcml2ID0gZHNpOworCWRzaW0tPmJyaWRnZS5w cmVfZW5hYmxlX3ByZXZfZmlyc3QgPSB0cnVlOworCisJcmV0dXJuIGNvbXBvbmVudF9hZGQoZHNp bS0+ZGV2LCAmZXh5bm9zX2RzaV9jb21wb25lbnRfb3BzKTsKK30KKworc3RhdGljIHZvaWQgZXh5 bm9zX2RzaV91bnJlZ2lzdGVyX2hvc3Qoc3RydWN0IGV4eW5vc19kc2kgKmRzaW0pCit7CisJY29t cG9uZW50X2RlbChkc2ltLT5kZXYsICZleHlub3NfZHNpX2NvbXBvbmVudF9vcHMpOworfQorCitz dGF0aWMgaW50IGdlbmVyaWNfZHNpbV9yZWdpc3Rlcl9ob3N0KHN0cnVjdCBleHlub3NfZHNpICpk c2ltKQoreworCXJldHVybiBtaXBpX2RzaV9ob3N0X3JlZ2lzdGVyKCZkc2ltLT5kc2lfaG9zdCk7 Cit9CisKK3N0YXRpYyB2b2lkIGdlbmVyaWNfZHNpbV91bnJlZ2lzdGVyX2hvc3Qoc3RydWN0IGV4 eW5vc19kc2kgKmRzaW0pCit7CisJbWlwaV9kc2lfaG9zdF91bnJlZ2lzdGVyKCZkc2ltLT5kc2lf aG9zdCk7Cit9CisKK3N0YXRpYyBjb25zdCBzdHJ1Y3QgZXh5bm9zX2RzaW1faG9zdF9vcHMgZ2Vu ZXJpY19kc2ltX2hvc3Rfb3BzID0geworCS5yZWdpc3Rlcl9ob3N0ID0gZ2VuZXJpY19kc2ltX3Jl Z2lzdGVyX2hvc3QsCisJLnVucmVnaXN0ZXJfaG9zdCA9IGdlbmVyaWNfZHNpbV91bnJlZ2lzdGVy X2hvc3QsCit9OworCiBzdGF0aWMgY29uc3Qgc3RydWN0IGRybV9icmlkZ2VfdGltaW5ncyBkc2lt X2JyaWRnZV90aW1pbmdzX2RlX2xvdyA9IHsKIAkuaW5wdXRfYnVzX2ZsYWdzID0gRFJNX0JVU19G TEFHX0RFX0xPVywKIH07CkBAIC0xODUzLDcgKzE5NDAsOSBAQCBzdGF0aWMgaW50IGV4eW5vc19k c2lfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKIAlpZiAoZHNpLT5wbGF0X2Rh dGEtPmh3X3R5cGUgPT0gRFNJTV9UWVBFX0lNWDhNTSkKIAkJZHNpLT5icmlkZ2UudGltaW5ncyA9 ICZkc2ltX2JyaWRnZV90aW1pbmdzX2RlX2xvdzsKIAotCXJldCA9IGNvbXBvbmVudF9hZGQoZGV2 LCAmZXh5bm9zX2RzaV9jb21wb25lbnRfb3BzKTsKKwlpZiAoZHNpLT5wbGF0X2RhdGEtPmhvc3Rf b3BzICYmIGRzaS0+cGxhdF9kYXRhLT5ob3N0X29wcy0+cmVnaXN0ZXJfaG9zdCkKKwkJcmV0ID0g ZHNpLT5wbGF0X2RhdGEtPmhvc3Rfb3BzLT5yZWdpc3Rlcl9ob3N0KGRzaSk7CisKIAlpZiAocmV0 KQogCQlnb3RvIGVycl9kaXNhYmxlX3J1bnRpbWU7CiAKQEAgLTE5NDQsMjQgKzIwMzMsMzYgQEAg c3RhdGljIGNvbnN0IHN0cnVjdCBkZXZfcG1fb3BzIGV4eW5vc19kc2lfcG1fb3BzID0gewogCQkJ CXBtX3J1bnRpbWVfZm9yY2VfcmVzdW1lKQogfTsKIAorc3RhdGljIGNvbnN0IHN0cnVjdCBleHlu b3NfZHNpbV9ob3N0X29wcyBleHlub3NfZHNpX2hvc3Rfb3BzID0geworCS5yZWdpc3Rlcl9ob3N0 ID0gZXh5bm9zX2RzaV9yZWdpc3Rlcl9ob3N0LAorCS51bnJlZ2lzdGVyX2hvc3QgPSBleHlub3Nf ZHNpX3VucmVnaXN0ZXJfaG9zdCwKKwkuYXR0YWNoID0gX2V4eW5vc19kc2lfaG9zdF9hdHRhY2gs CisJLmRldGFjaCA9IF9leHlub3NfZHNpX2hvc3RfZGV0YWNoLAorfTsKKwogc3RhdGljIGNvbnN0 IHN0cnVjdCBleHlub3NfZHNpX3BsYXRfZGF0YSBleHlub3MzMjUwX2RzaV9wZGF0YSA9IHsKIAku aHdfdHlwZSA9IERTSU1fVFlQRV9FWFlOT1MzMjUwLAorCS5ob3N0X29wcyA9ICZleHlub3NfZHNp X2hvc3Rfb3BzLAogfTsKIAogc3RhdGljIGNvbnN0IHN0cnVjdCBleHlub3NfZHNpX3BsYXRfZGF0 YSBleHlub3M0MjEwX2RzaV9wZGF0YSA9IHsKIAkuaHdfdHlwZSA9IERTSU1fVFlQRV9FWFlOT1M0 MjEwLAorCS5ob3N0X29wcyA9ICZleHlub3NfZHNpX2hvc3Rfb3BzLAogfTsKIAogc3RhdGljIGNv bnN0IHN0cnVjdCBleHlub3NfZHNpX3BsYXRfZGF0YSBleHlub3M1NDEwX2RzaV9wZGF0YSA9IHsK IAkuaHdfdHlwZSA9IERTSU1fVFlQRV9FWFlOT1M1NDEwLAorCS5ob3N0X29wcyA9ICZleHlub3Nf ZHNpX2hvc3Rfb3BzLAogfTsKIAogc3RhdGljIGNvbnN0IHN0cnVjdCBleHlub3NfZHNpX3BsYXRf ZGF0YSBleHlub3M1NDIyX2RzaV9wZGF0YSA9IHsKIAkuaHdfdHlwZSA9IERTSU1fVFlQRV9FWFlO T1M1NDIyLAorCS5ob3N0X29wcyA9ICZleHlub3NfZHNpX2hvc3Rfb3BzLAogfTsKIAogc3RhdGlj IGNvbnN0IHN0cnVjdCBleHlub3NfZHNpX3BsYXRfZGF0YSBleHlub3M1NDMzX2RzaV9wZGF0YSA9 IHsKIAkuaHdfdHlwZSA9IERTSU1fVFlQRV9FWFlOT1M1NDMzLAorCS5ob3N0X29wcyA9ICZleHlu b3NfZHNpX2hvc3Rfb3BzLAogfTsKIAogc3RhdGljIGNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQg ZXh5bm9zX2RzaV9vZl9tYXRjaFtdID0gewotLSAKMi4yNS4xCgoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxp c3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZy YWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0FB5C54E94 for ; Mon, 23 Jan 2023 15:14:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D17010E4BD; Mon, 23 Jan 2023 15:14:03 +0000 (UTC) Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7783110E4BD for ; Mon, 23 Jan 2023 15:13:56 +0000 (UTC) Received: by mail-pl1-x62a.google.com with SMTP id k18so11684126pll.5 for ; Mon, 23 Jan 2023 07:13:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M1hJXJQdt5ZCT1mSKIuiHURptg88R24MKTm4kRNQiUQ=; b=O3tW1IzwPy+pXd+6z860JUtYpMiR7mFgXQs6/v8mpMuWvKQ5YMipEZmel5OgELuDxH 2vH855f3BdVdBO+KLuutaTd7k5tQIAbtMGXfIoRs4omdnDjQM40shSOQE+i3ZFSrO7uq 3MWjZDEE3EM2ptjlhE17D2I67c2KhWt4hHthI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M1hJXJQdt5ZCT1mSKIuiHURptg88R24MKTm4kRNQiUQ=; b=cbJMlS8tN/daKUTIZkonYyssM6Pl7cIGC8qqmwtoHsdKQcSHBucA+VumWHqhmYUtQ9 erZIdFDi7U9EEEVgzChrQXZncKbQhTk6PrhPuimB/8Sh+2VIl9uSxf4wW3HKNXiru7Xa 1mLPwAQQLqCPyGr+IcmQ8zSfUOp7swRhZ+ITzhHEzXMVULddGpeeuB2Ho1Sp3qgtF31G Hv4Y6p8fmBzKvNnUmsNT3gj2w38UA/73UHMmDEv0ziHTBZODcobLvaA7yWitbIDVVNDD aTPvYADWK8lTZVEwfzpS5XoWFDNfdJsVFk6NTp7W5CGmDJp6ZhDKHLXU8gl1potqqiwT iQZQ== X-Gm-Message-State: AFqh2koxfpJx9Hw3UsJbsrqxoe8ZLhKrG/NwPfJfOuHCFu6b8oYi4SEn Iu5S+J7c63Z3Hwwa20ug3+z9Sw== X-Google-Smtp-Source: AMrXdXs6LCi1WTkUN0zffk3jV0ED06YVEWEpCsymLgZJLxCCm1G+wm+RviRE25+QBU5GGXxHipnyUg== X-Received: by 2002:a17:902:c3c6:b0:192:c014:f6ba with SMTP id j6-20020a170902c3c600b00192c014f6bamr24929553plj.33.1674486836050; Mon, 23 Jan 2023 07:13:56 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a15f:2279:f361:f93b:7971]) by smtp.gmail.com with ESMTPSA id d5-20020a170903230500b001754fa42065sm19207111plh.143.2023.01.23.07.13.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:13:55 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [RESEND PATCH v11 12/18] drm: exynos: dsi: Consolidate component and bridge Date: Mon, 23 Jan 2023 20:42:06 +0530 Message-Id: <20230123151212.269082-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230123151212.269082-1-jagan@amarulasolutions.com> References: <20230123151212.269082-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" DSI host registration, attach and detach operations are quite different for the component and bridge-based DRM drivers.  Supporting generic bridge driver to use both component and bridge based DRM drivers can be tricky and would require additional host related operation hooks. Add host operation hooks for registering and unregistering Exynos and generic drivers, where Exynos hooks are used in existing Exynos component based DRM drivers and generic hooks are used in i.MX8M bridge based DRM drivers.  Add host attach and detach operation hooks for Exynos component DRM drivers and those get invoked while DSI core host attach and detach gets called. Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v11: - none Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 179 ++++++++++++++++++------ 1 file changed, 140 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7afbbe30d1d3..fc7f00ab01b4 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -250,6 +250,8 @@ struct exynos_dsi_transfer { u16 rx_done; }; +struct exynos_dsi; + #define DSIM_STATE_ENABLED BIT(0) #define DSIM_STATE_INITIALIZED BIT(1) #define DSIM_STATE_CMD_LPM BIT(2) @@ -281,12 +283,19 @@ struct exynos_dsi_driver_data { const unsigned int *reg_values; }; +struct exynos_dsim_host_ops { + int (*register_host)(struct exynos_dsi *dsim); + void (*unregister_host)(struct exynos_dsi *dsim); + int (*attach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); + int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); +}; + struct exynos_dsi_plat_data { enum exynos_dsi_type hw_type; + const struct exynos_dsim_host_ops *host_ops; }; struct exynos_dsi { - struct drm_encoder encoder; struct mipi_dsi_host dsi_host; struct drm_bridge bridge; struct drm_bridge *out_bridge; @@ -316,6 +325,12 @@ struct exynos_dsi { const struct exynos_dsi_driver_data *driver_data; const struct exynos_dsi_plat_data *plat_data; + + void *priv; +}; + +struct exynos_dsi_enc { + struct drm_encoder encoder; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -1319,10 +1334,11 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) { - struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; + struct exynos_dsi *dsim = (struct exynos_dsi *)dev_id; + struct exynos_dsi_enc *dsi = dsim->priv; struct drm_encoder *encoder = &dsi->encoder; - if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) + if (dsim->state & DSIM_STATE_VIDOUT_AVAILABLE) exynos_drm_crtc_te_handler(encoder->crtc); return IRQ_HANDLED; @@ -1595,9 +1611,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; struct device *dev = dsi->dev; - struct drm_encoder *encoder = &dsi->encoder; - struct drm_device *drm = encoder->dev; int ret; dsi->out_bridge = devm_drm_of_dsi_get_bridge(dev, dev->of_node, 1, 0); @@ -1611,35 +1626,15 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, drm_bridge_add(&dsi->bridge); - drm_bridge_attach(encoder, &dsi->bridge, - list_first_entry_or_null(&encoder->bridge_chain, - struct drm_bridge, - chain_node), 0); - - /* - * This is a temporary solution and should be made by more generic way. - * - * If attached panel device is for command mode one, dsi should register - * TE interrupt handler. - */ - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { - ret = exynos_dsi_register_te_irq(dsi, &device->dev); - if (ret) + if (pdata->host_ops && pdata->host_ops->attach) { + ret = pdata->host_ops->attach(dsi, device); + if (ret < 0) return ret; } - mutex_lock(&drm->mode_config.mutex); - dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); - - mutex_unlock(&drm->mode_config.mutex); - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); return 0; } @@ -1648,12 +1643,14 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); - struct drm_device *drm = dsi->encoder.dev; - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; + int ret; - exynos_dsi_unregister_te_irq(dsi); + if (pdata->host_ops && pdata->host_ops->detach) { + ret = pdata->host_ops->detach(dsi, device); + if (ret < 0) + return ret; + } drm_bridge_remove(&dsi->bridge); @@ -1727,10 +1724,66 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) return 0; } +static int _exynos_dsi_host_attach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi = dsim->priv; + struct drm_encoder *encoder = &dsi->encoder; + struct drm_device *drm = encoder->dev; + int ret; + + drm_bridge_attach(encoder, &dsim->bridge, + list_first_entry_or_null(&encoder->bridge_chain, + struct drm_bridge, + chain_node), 0); + + /* + * This is a temporary solution and should be made by more generic way. + * + * If attached panel device is for command mode one, dsi should register + * TE interrupt handler. + */ + if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { + ret = exynos_dsi_register_te_irq(dsim, &device->dev); + if (ret) + return ret; + } + + mutex_lock(&drm->mode_config.mutex); + + dsim->lanes = device->lanes; + dsim->format = device->format; + dsim->mode_flags = device->mode_flags; + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = + !(dsim->mode_flags & MIPI_DSI_MODE_VIDEO); + + mutex_unlock(&drm->mode_config.mutex); + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + return 0; +} + +static int _exynos_dsi_host_detach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi = dsim->priv; + struct drm_device *drm = dsi->encoder.dev; + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + exynos_dsi_unregister_te_irq(dsim); + + return 0; +} + static int exynos_dsi_bind(struct device *dev, struct device *master, void *data) { - struct exynos_dsi *dsi = dev_get_drvdata(dev); + struct exynos_dsi *dsim = dev_get_drvdata(dev); + struct exynos_dsi_enc *dsi = dsim->priv; struct drm_encoder *encoder = &dsi->encoder; struct drm_device *drm_dev = data; int ret; @@ -1741,17 +1794,17 @@ static int exynos_dsi_bind(struct device *dev, struct device *master, if (ret < 0) return ret; - return mipi_dsi_host_register(&dsi->dsi_host); + return mipi_dsi_host_register(&dsim->dsi_host); } static void exynos_dsi_unbind(struct device *dev, struct device *master, void *data) { - struct exynos_dsi *dsi = dev_get_drvdata(dev); + struct exynos_dsi *dsim = dev_get_drvdata(dev); - exynos_dsi_atomic_disable(&dsi->bridge, NULL); + dsim->bridge.funcs->atomic_disable(&dsim->bridge, NULL); - mipi_dsi_host_unregister(&dsi->dsi_host); + mipi_dsi_host_unregister(&dsim->dsi_host); } static const struct component_ops exynos_dsi_component_ops = { @@ -1759,6 +1812,40 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static int exynos_dsi_register_host(struct exynos_dsi *dsim) +{ + struct exynos_dsi_enc *dsi; + + dsi = devm_kzalloc(dsim->dev, sizeof(*dsi), GFP_KERNEL); + if (!dsi) + return -ENOMEM; + + dsim->priv = dsi; + dsim->bridge.pre_enable_prev_first = true; + + return component_add(dsim->dev, &exynos_dsi_component_ops); +} + +static void exynos_dsi_unregister_host(struct exynos_dsi *dsim) +{ + component_del(dsim->dev, &exynos_dsi_component_ops); +} + +static int generic_dsim_register_host(struct exynos_dsi *dsim) +{ + return mipi_dsi_host_register(&dsim->dsi_host); +} + +static void generic_dsim_unregister_host(struct exynos_dsi *dsim) +{ + mipi_dsi_host_unregister(&dsim->dsi_host); +} + +static const struct exynos_dsim_host_ops generic_dsim_host_ops = { + .register_host = generic_dsim_register_host, + .unregister_host = generic_dsim_unregister_host, +}; + static const struct drm_bridge_timings dsim_bridge_timings_de_low = { .input_bus_flags = DRM_BUS_FLAG_DE_LOW, }; @@ -1853,7 +1940,9 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) dsi->bridge.timings = &dsim_bridge_timings_de_low; - ret = component_add(dev, &exynos_dsi_component_ops); + if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host) + ret = dsi->plat_data->host_ops->register_host(dsi); + if (ret) goto err_disable_runtime; @@ -1944,24 +2033,36 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { + .register_host = exynos_dsi_register_host, + .unregister_host = exynos_dsi_unregister_host, + .attach = _exynos_dsi_host_attach, + .detach = _exynos_dsi_host_detach, +}; + static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS3250, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos4210_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS4210, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5410_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5410, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5422_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5422, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5433_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5433, + .host_ops = &exynos_dsi_host_ops, }; static const struct of_device_id exynos_dsi_of_match[] = { -- 2.25.1