From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CB59C61D97 for ; Thu, 26 Jan 2023 14:47:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231766AbjAZOrQ (ORCPT ); Thu, 26 Jan 2023 09:47:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231800AbjAZOrN (ORCPT ); Thu, 26 Jan 2023 09:47:13 -0500 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B84168103 for ; Thu, 26 Jan 2023 06:47:10 -0800 (PST) Received: by mail-pj1-x102b.google.com with SMTP id e8-20020a17090a9a8800b0022c387f0f93so414326pjp.3 for ; Thu, 26 Jan 2023 06:47:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yo9iZG7thbeh/Q27IofLDMHgJmskqvn2YbJQaVoxMqQ=; b=CUCJGPZqVeTNxZhmD8kbxeX54VEw10wH07dpyKYcsRZGhiKPYPaJ3tTUPJmo5eUQxJ QuJivUx8h+omIpIPCX2ZP0c7rr2N8m7qBdbDflnBP0FKWp0/aISKcQ4buviXQtpXp2HE s7/QtKSGhE5X8z1WNrQwfn5M+89JuNiZROfXQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yo9iZG7thbeh/Q27IofLDMHgJmskqvn2YbJQaVoxMqQ=; b=q2F3kcsOCMc5hljJTPsG46NtBBVtLaCXmBkt9WXmR6rxdVfmh99lWYVEozqKI64CNr zMgeCuf5yP395insnI780VplthEKnUUVtSewZOJwds1KvCj1QAMGy+3jS3rxxTqWRjEw uXn5T5k4G8i1cjlZ+SOysQhnyYZBlgPjKVnCMbd3Set4IRlMXSHxI3USGIAfP6w0Olst O+V3wjARcf+BcKA+vFM27PrX4Hk5va57eQLo509GJ/YfWYExthLhnBa9/waPvBoUTOWP AeuMjavgnHoqgyRIej0R6+yc+g8vb/07ZFfGlqFxWNMexzYD7owGdmmnyMycsaSJEqGQ xDuA== X-Gm-Message-State: AFqh2koCYp7QAskbaE22n6ci2OcFy4oA+EJH1EMXTb+sexsbLNnEc913 ni2GQs+NP+AgdvxMIT2xEfQ+PQ== X-Google-Smtp-Source: AMrXdXsGaDL5rMpUBoKG3U8u8dTLn/jnhIssGrjijm66UICzJGvcAWDkbJy2ZF+O5rTZxT4vKqWLYg== X-Received: by 2002:a17:90b:4c43:b0:22b:b392:96be with SMTP id np3-20020a17090b4c4300b0022bb39296bemr23651311pjb.6.1674744429421; Thu, 26 Jan 2023 06:47:09 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a238:3cb1:2156:ef87:8af5]) by smtp.gmail.com with ESMTPSA id d197-20020a6336ce000000b0042988a04bfdsm823660pga.9.2023.01.26.06.46.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Jan 2023 06:47:08 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Robert Foss , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v12 12/18] drm: exynos: dsi: Consolidate component and bridge Date: Thu, 26 Jan 2023 20:14:21 +0530 Message-Id: <20230126144427.607098-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230126144427.607098-1-jagan@amarulasolutions.com> References: <20230126144427.607098-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org DSI host registration, attach and detach operations are quite different for the component and bridge-based DRM drivers.  Supporting generic bridge driver to use both component and bridge based DRM drivers can be tricky and would require additional host related operation hooks. Add host operation hooks for registering and unregistering Exynos and generic drivers, where Exynos hooks are used in existing Exynos component based DRM drivers and generic hooks are used in i.MX8M bridge based DRM drivers.  Add host attach and detach operation hooks for Exynos component DRM drivers and those get invoked while DSI core host attach and detach gets called. Reviewed-by: Marek Vasut Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v12: - fix unneeded decleration - collect RB from Marek Changes for v11: - none Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 169 +++++++++++++++++++----- 1 file changed, 134 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 9459c138d0e0..488fae218205 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -283,10 +283,10 @@ struct exynos_dsi_driver_data { struct exynos_dsi_plat_data { enum exynos_dsi_type hw_type; + const struct exynos_dsim_host_ops *host_ops; }; struct exynos_dsi { - struct drm_encoder encoder; struct mipi_dsi_host dsi_host; struct drm_bridge bridge; struct drm_bridge *out_bridge; @@ -316,6 +316,19 @@ struct exynos_dsi { const struct exynos_dsi_driver_data *driver_data; const struct exynos_dsi_plat_data *plat_data; + + void *priv; +}; + +struct exynos_dsim_host_ops { + int (*register_host)(struct exynos_dsi *dsim); + void (*unregister_host)(struct exynos_dsi *dsim); + int (*attach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); + int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); +}; + +struct exynos_dsi_enc { + struct drm_encoder encoder; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -1320,7 +1333,8 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) { struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; - struct drm_encoder *encoder = &dsi->encoder; + struct exynos_dsi_enc *dsi_enc = dsi->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) exynos_drm_crtc_te_handler(encoder->crtc); @@ -1589,9 +1603,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; struct device *dev = dsi->dev; - struct drm_encoder *encoder = &dsi->encoder; - struct drm_device *drm = encoder->dev; int ret; dsi->out_bridge = devm_drm_of_dsi_get_bridge(dev, dev->of_node, 1, 0); @@ -1605,35 +1618,15 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, drm_bridge_add(&dsi->bridge); - drm_bridge_attach(encoder, &dsi->bridge, - list_first_entry_or_null(&encoder->bridge_chain, - struct drm_bridge, - chain_node), 0); - - /* - * This is a temporary solution and should be made by more generic way. - * - * If attached panel device is for command mode one, dsi should register - * TE interrupt handler. - */ - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { - ret = exynos_dsi_register_te_irq(dsi, &device->dev); - if (ret) + if (pdata->host_ops && pdata->host_ops->attach) { + ret = pdata->host_ops->attach(dsi, device); + if (ret < 0) return ret; } - mutex_lock(&drm->mode_config.mutex); - dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); - - mutex_unlock(&drm->mode_config.mutex); - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); return 0; } @@ -1642,12 +1635,14 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); - struct drm_device *drm = dsi->encoder.dev; - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; + int ret; - exynos_dsi_unregister_te_irq(dsi); + if (pdata->host_ops && pdata->host_ops->detach) { + ret = pdata->host_ops->detach(dsi, device); + if (ret < 0) + return ret; + } drm_bridge_remove(&dsi->bridge); @@ -1721,11 +1716,67 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) return 0; } +static int _exynos_dsi_host_attach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; + struct drm_device *drm = encoder->dev; + int ret; + + drm_bridge_attach(encoder, &dsim->bridge, + list_first_entry_or_null(&encoder->bridge_chain, + struct drm_bridge, + chain_node), 0); + + /* + * This is a temporary solution and should be made by more generic way. + * + * If attached panel device is for command mode one, dsi should register + * TE interrupt handler. + */ + if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { + ret = exynos_dsi_register_te_irq(dsim, &device->dev); + if (ret) + return ret; + } + + mutex_lock(&drm->mode_config.mutex); + + dsim->lanes = device->lanes; + dsim->format = device->format; + dsim->mode_flags = device->mode_flags; + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = + !(dsim->mode_flags & MIPI_DSI_MODE_VIDEO); + + mutex_unlock(&drm->mode_config.mutex); + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + return 0; +} + +static int _exynos_dsi_host_detach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_device *drm = dsi_enc->encoder.dev; + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + exynos_dsi_unregister_te_irq(dsim); + + return 0; +} + static int exynos_dsi_bind(struct device *dev, struct device *master, void *data) { struct exynos_dsi *dsi = dev_get_drvdata(dev); - struct drm_encoder *encoder = &dsi->encoder; + struct exynos_dsi_enc *dsi_enc = dsi->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; struct drm_device *drm_dev = data; int ret; @@ -1743,7 +1794,7 @@ static void exynos_dsi_unbind(struct device *dev, struct device *master, { struct exynos_dsi *dsi = dev_get_drvdata(dev); - exynos_dsi_atomic_disable(&dsi->bridge, NULL); + dsi->bridge.funcs->atomic_disable(&dsi->bridge, NULL); mipi_dsi_host_unregister(&dsi->dsi_host); } @@ -1753,6 +1804,40 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static int exynos_dsi_register_host(struct exynos_dsi *dsim) +{ + struct exynos_dsi_enc *dsi_enc; + + dsi_enc = devm_kzalloc(dsim->dev, sizeof(*dsi_enc), GFP_KERNEL); + if (!dsi_enc) + return -ENOMEM; + + dsim->priv = dsi_enc; + dsim->bridge.pre_enable_prev_first = true; + + return component_add(dsim->dev, &exynos_dsi_component_ops); +} + +static void exynos_dsi_unregister_host(struct exynos_dsi *dsim) +{ + component_del(dsim->dev, &exynos_dsi_component_ops); +} + +static int generic_dsim_register_host(struct exynos_dsi *dsim) +{ + return mipi_dsi_host_register(&dsim->dsi_host); +} + +static void generic_dsim_unregister_host(struct exynos_dsi *dsim) +{ + mipi_dsi_host_unregister(&dsim->dsi_host); +} + +static const struct exynos_dsim_host_ops generic_dsim_host_ops = { + .register_host = generic_dsim_register_host, + .unregister_host = generic_dsim_unregister_host, +}; + static const struct drm_bridge_timings dsim_bridge_timings_de_low = { .input_bus_flags = DRM_BUS_FLAG_DE_LOW, }; @@ -1847,7 +1932,9 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) dsi->bridge.timings = &dsim_bridge_timings_de_low; - ret = component_add(dev, &exynos_dsi_component_ops); + if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host) + ret = dsi->plat_data->host_ops->register_host(dsi); + if (ret) goto err_disable_runtime; @@ -1938,24 +2025,36 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { + .register_host = exynos_dsi_register_host, + .unregister_host = exynos_dsi_unregister_host, + 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dmVycy7CoAoKU3VwcG9ydGluZyBnZW5lcmljIGJyaWRnZSBkcml2ZXIgdG8gdXNlIGJvdGggY29t cG9uZW50wqBhbmQgYnJpZGdlCmJhc2VkIERSTSBkcml2ZXJzIGNhbiBiZSB0cmlja3kgYW5kIHdv dWxkIHJlcXVpcmUgYWRkaXRpb25hbCBob3N0CnJlbGF0ZWQgb3BlcmF0aW9uIGhvb2tzLgoKQWRk IGhvc3Qgb3BlcmF0aW9uIGhvb2tzIGZvciByZWdpc3RlcmluZyBhbmQgdW5yZWdpc3RlcmluZyBF eHlub3MKYW5kIGdlbmVyaWMgZHJpdmVycywgd2hlcmUgRXh5bm9zIGhvb2tzIGFyZSB1c2VkIGlu IGV4aXN0aW5nIEV4eW5vcwpjb21wb25lbnTCoGJhc2VkIERSTSBkcml2ZXJzIGFuZCBnZW5lcmlj IGhvb2tzIGFyZSB1c2VkIGluIGkuTVg4TQpicmlkZ2UgYmFzZWQgRFJNIGRyaXZlcnMuwqAKCkFk ZCBob3N0IGF0dGFjaCBhbmQgZGV0YWNoIG9wZXJhdGlvbiBob29rcyBmb3IgRXh5bm9zIGNvbXBv bmVudApEUk0gZHJpdmVycyBhbmQgdGhvc2UgZ2V0IGludm9rZWQgd2hpbGUgRFNJIGNvcmUgaG9z dCBhdHRhY2ggYW5kCmRldGFjaCBnZXRzIGNhbGxlZC4KClJldmlld2VkLWJ5OiBNYXJlayBWYXN1 dCA8bWFyZXhAZGVueC5kZT4KU2lnbmVkLW9mZi1ieTogTWFyZWsgU3p5cHJvd3NraSA8bS5zenlw cm93c2tpQHNhbXN1bmcuY29tPgpTaWduZWQtb2ZmLWJ5OiBKYWdhbiBUZWtpIDxqYWdhbkBhbWFy dWxhc29sdXRpb25zLmNvbT4KLS0tCkNoYW5nZXMgZm9yIHYxMjoKLSBmaXggdW5uZWVkZWQgZGVj bGVyYXRpb24KLSBjb2xsZWN0IFJCIGZyb20gTWFyZWsKQ2hhbmdlcyBmb3IgdjExOgotIG5vbmUK Q2hhbmdlcyBmb3IgdjEwOgotIHNwbGl0IGZyb20gcHJldmlvdXMgc2VyaWVzIHBhdGNoCiJkcm06 IGJyaWRnZTogR2VuZXJhbGl6ZSBFeHlub3MtRFNJIGRyaXZlciBpbnRvIGEgU2Ftc3VuZyBEU0lN IGJyaWRnZSIKCiBkcml2ZXJzL2dwdS9kcm0vZXh5bm9zL2V4eW5vc19kcm1fZHNpLmMgfCAxNjkg KysrKysrKysrKysrKysrKysrKy0tLS0tCiAxIGZpbGUgY2hhbmdlZCwgMTM0IGluc2VydGlvbnMo KyksIDM1IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9leHlub3Mv ZXh5bm9zX2RybV9kc2kuYyBiL2RyaXZlcnMvZ3B1L2RybS9leHlub3MvZXh5bm9zX2RybV9kc2ku YwppbmRleCA5NDU5YzEzOGQwZTAuLjQ4OGZhZTIxODIwNSAxMDA2NDQKLS0tIGEvZHJpdmVycy9n cHUvZHJtL2V4eW5vcy9leHlub3NfZHJtX2RzaS5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9leHlu b3MvZXh5bm9zX2RybV9kc2kuYwpAQCAtMjgzLDEwICsyODMsMTAgQEAgc3RydWN0IGV4eW5vc19k c2lfZHJpdmVyX2RhdGEgewogCiBzdHJ1Y3QgZXh5bm9zX2RzaV9wbGF0X2RhdGEgewogCWVudW0g ZXh5bm9zX2RzaV90eXBlIGh3X3R5cGU7CisJY29uc3Qgc3RydWN0IGV4eW5vc19kc2ltX2hvc3Rf b3BzICpob3N0X29wczsKIH07CiAKIHN0cnVjdCBleHlub3NfZHNpIHsKLQlzdHJ1Y3QgZHJtX2Vu Y29kZXIgZW5jb2RlcjsKIAlzdHJ1Y3QgbWlwaV9kc2lfaG9zdCBkc2lfaG9zdDsKIAlzdHJ1Y3Qg ZHJtX2JyaWRnZSBicmlkZ2U7CiAJc3RydWN0IGRybV9icmlkZ2UgKm91dF9icmlkZ2U7CkBAIC0z MTYsNiArMzE2LDE5IEBAIHN0cnVjdCBleHlub3NfZHNpIHsKIAogCWNvbnN0IHN0cnVjdCBleHlu b3NfZHNpX2RyaXZlcl9kYXRhICpkcml2ZXJfZGF0YTsKIAljb25zdCBzdHJ1Y3QgZXh5bm9zX2Rz aV9wbGF0X2RhdGEgKnBsYXRfZGF0YTsKKworCXZvaWQgKnByaXY7Cit9OworCitzdHJ1Y3QgZXh5 bm9zX2RzaW1faG9zdF9vcHMgeworCWludCAoKnJlZ2lzdGVyX2hvc3QpKHN0cnVjdCBleHlub3Nf ZHNpICpkc2ltKTsKKwl2b2lkICgqdW5yZWdpc3Rlcl9ob3N0KShzdHJ1Y3QgZXh5bm9zX2RzaSAq ZHNpbSk7CisJaW50ICgqYXR0YWNoKShzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpbSwgc3RydWN0IG1p cGlfZHNpX2RldmljZSAqZGV2aWNlKTsKKwlpbnQgKCpkZXRhY2gpKHN0cnVjdCBleHlub3NfZHNp ICpkc2ltLCBzdHJ1Y3QgbWlwaV9kc2lfZGV2aWNlICpkZXZpY2UpOworfTsKKworc3RydWN0IGV4 eW5vc19kc2lfZW5jIHsKKwlzdHJ1Y3QgZHJtX2VuY29kZXIgZW5jb2RlcjsKIH07CiAKICNkZWZp bmUgaG9zdF90b19kc2koaG9zdCkgY29udGFpbmVyX29mKGhvc3QsIHN0cnVjdCBleHlub3NfZHNp LCBkc2lfaG9zdCkKQEAgLTEzMjAsNyArMTMzMyw4IEBAIHN0YXRpYyBpcnFyZXR1cm5fdCBleHlu b3NfZHNpX2lycShpbnQgaXJxLCB2b2lkICpkZXZfaWQpCiBzdGF0aWMgaXJxcmV0dXJuX3QgZXh5 bm9zX2RzaV90ZV9pcnFfaGFuZGxlcihpbnQgaXJxLCB2b2lkICpkZXZfaWQpCiB7CiAJc3RydWN0 IGV4eW5vc19kc2kgKmRzaSA9IChzdHJ1Y3QgZXh5bm9zX2RzaSAqKWRldl9pZDsKLQlzdHJ1Y3Qg ZHJtX2VuY29kZXIgKmVuY29kZXIgPSAmZHNpLT5lbmNvZGVyOworCXN0cnVjdCBleHlub3NfZHNp X2VuYyAqZHNpX2VuYyA9IGRzaS0+cHJpdjsKKwlzdHJ1Y3QgZHJtX2VuY29kZXIgKmVuY29kZXIg PSAmZHNpX2VuYy0+ZW5jb2RlcjsKIAogCWlmIChkc2ktPnN0YXRlICYgRFNJTV9TVEFURV9WSURP VVRfQVZBSUxBQkxFKQogCQlleHlub3NfZHJtX2NydGNfdGVfaGFuZGxlcihlbmNvZGVyLT5jcnRj KTsKQEAgLTE1ODksOSArMTYwMyw4IEBAIHN0YXRpYyBpbnQgZXh5bm9zX2RzaV9ob3N0X2F0dGFj aChzdHJ1Y3QgbWlwaV9kc2lfaG9zdCAqaG9zdCwKIAkJCQkgIHN0cnVjdCBtaXBpX2RzaV9kZXZp Y2UgKmRldmljZSkKIHsKIAlzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpID0gaG9zdF90b19kc2koaG9z dCk7CisJY29uc3Qgc3RydWN0IGV4eW5vc19kc2lfcGxhdF9kYXRhICpwZGF0YSA9IGRzaS0+cGxh dF9kYXRhOwogCXN0cnVjdCBkZXZpY2UgKmRldiA9IGRzaS0+ZGV2OwotCXN0cnVjdCBkcm1fZW5j b2RlciAqZW5jb2RlciA9ICZkc2ktPmVuY29kZXI7Ci0Jc3RydWN0IGRybV9kZXZpY2UgKmRybSA9 IGVuY29kZXItPmRldjsKIAlpbnQgcmV0OwogCiAJZHNpLT5vdXRfYnJpZGdlID0gZGV2bV9kcm1f b2ZfZHNpX2dldF9icmlkZ2UoZGV2LCBkZXYtPm9mX25vZGUsIDEsIDApOwpAQCAtMTYwNSwzNSAr MTYxOCwxNSBAQCBzdGF0aWMgaW50IGV4eW5vc19kc2lfaG9zdF9hdHRhY2goc3RydWN0IG1pcGlf ZHNpX2hvc3QgKmhvc3QsCiAKIAlkcm1fYnJpZGdlX2FkZCgmZHNpLT5icmlkZ2UpOwogCi0JZHJt X2JyaWRnZV9hdHRhY2goZW5jb2RlciwgJmRzaS0+YnJpZGdlLAotCQkJICBsaXN0X2ZpcnN0X2Vu dHJ5X29yX251bGwoJmVuY29kZXItPmJyaWRnZV9jaGFpbiwKLQkJCQkJCSAgIHN0cnVjdCBkcm1f YnJpZGdlLAotCQkJCQkJICAgY2hhaW5fbm9kZSksIDApOwotCi0JLyoKLQkgKiBUaGlzIGlzIGEg dGVtcG9yYXJ5IHNvbHV0aW9uIGFuZCBzaG91bGQgYmUgbWFkZSBieSBtb3JlIGdlbmVyaWMgd2F5 LgotCSAqCi0JICogSWYgYXR0YWNoZWQgcGFuZWwgZGV2aWNlIGlzIGZvciBjb21tYW5kIG1vZGUg b25lLCBkc2kgc2hvdWxkIHJlZ2lzdGVyCi0JICogVEUgaW50ZXJydXB0IGhhbmRsZXIuCi0JICov Ci0JaWYgKCEoZGV2aWNlLT5tb2RlX2ZsYWdzICYgTUlQSV9EU0lfTU9ERV9WSURFTykpIHsKLQkJ cmV0ID0gZXh5bm9zX2RzaV9yZWdpc3Rlcl90ZV9pcnEoZHNpLCAmZGV2aWNlLT5kZXYpOwotCQlp ZiAocmV0KQorCWlmIChwZGF0YS0+aG9zdF9vcHMgJiYgcGRhdGEtPmhvc3Rfb3BzLT5hdHRhY2gp IHsKKwkJcmV0ID0gcGRhdGEtPmhvc3Rfb3BzLT5hdHRhY2goZHNpLCBkZXZpY2UpOworCQlpZiAo cmV0IDwgMCkKIAkJCXJldHVybiByZXQ7CiAJfQogCi0JbXV0ZXhfbG9jaygmZHJtLT5tb2RlX2Nv bmZpZy5tdXRleCk7Ci0KIAlkc2ktPmxhbmVzID0gZGV2aWNlLT5sYW5lczsKIAlkc2ktPmZvcm1h dCA9IGRldmljZS0+Zm9ybWF0OwogCWRzaS0+bW9kZV9mbGFncyA9IGRldmljZS0+bW9kZV9mbGFn czsKLQlleHlub3NfZHJtX2NydGNfZ2V0X2J5X3R5cGUoZHJtLCBFWFlOT1NfRElTUExBWV9UWVBF X0xDRCktPmk4MF9tb2RlID0KLQkJCSEoZHNpLT5tb2RlX2ZsYWdzICYgTUlQSV9EU0lfTU9ERV9W SURFTyk7Ci0KLQltdXRleF91bmxvY2soJmRybS0+bW9kZV9jb25maWcubXV0ZXgpOwotCi0JaWYg KGRybS0+bW9kZV9jb25maWcucG9sbF9lbmFibGVkKQotCQlkcm1fa21zX2hlbHBlcl9ob3RwbHVn X2V2ZW50KGRybSk7CiAKIAlyZXR1cm4gMDsKIH0KQEAgLTE2NDIsMTIgKzE2MzUsMTQgQEAgc3Rh dGljIGludCBleHlub3NfZHNpX2hvc3RfZGV0YWNoKHN0cnVjdCBtaXBpX2RzaV9ob3N0ICpob3N0 LAogCQkJCSAgc3RydWN0IG1pcGlfZHNpX2RldmljZSAqZGV2aWNlKQogewogCXN0cnVjdCBleHlu b3NfZHNpICpkc2kgPSBob3N0X3RvX2RzaShob3N0KTsKLQlzdHJ1Y3QgZHJtX2RldmljZSAqZHJt ID0gZHNpLT5lbmNvZGVyLmRldjsKLQotCWlmIChkcm0tPm1vZGVfY29uZmlnLnBvbGxfZW5hYmxl ZCkKLQkJZHJtX2ttc19oZWxwZXJfaG90cGx1Z19ldmVudChkcm0pOworCWNvbnN0IHN0cnVjdCBl eHlub3NfZHNpX3BsYXRfZGF0YSAqcGRhdGEgPSBkc2ktPnBsYXRfZGF0YTsKKwlpbnQgcmV0Owog Ci0JZXh5bm9zX2RzaV91bnJlZ2lzdGVyX3RlX2lycShkc2kpOworCWlmIChwZGF0YS0+aG9zdF9v cHMgJiYgcGRhdGEtPmhvc3Rfb3BzLT5kZXRhY2gpIHsKKwkJcmV0ID0gcGRhdGEtPmhvc3Rfb3Bz LT5kZXRhY2goZHNpLCBkZXZpY2UpOworCQlpZiAocmV0IDwgMCkKKwkJCXJldHVybiByZXQ7CisJ fQogCiAJZHJtX2JyaWRnZV9yZW1vdmUoJmRzaS0+YnJpZGdlKTsKIApAQCAtMTcyMSwxMSArMTcx Niw2NyBAQCBzdGF0aWMgaW50IGV4eW5vc19kc2lfcGFyc2VfZHQoc3RydWN0IGV4eW5vc19kc2kg KmRzaSkKIAlyZXR1cm4gMDsKIH0KIAorc3RhdGljIGludCBfZXh5bm9zX2RzaV9ob3N0X2F0dGFj aChzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpbSwKKwkJCQkgICBzdHJ1Y3QgbWlwaV9kc2lfZGV2aWNl ICpkZXZpY2UpCit7CisJc3RydWN0IGV4eW5vc19kc2lfZW5jICpkc2lfZW5jID0gZHNpbS0+cHJp djsKKwlzdHJ1Y3QgZHJtX2VuY29kZXIgKmVuY29kZXIgPSAmZHNpX2VuYy0+ZW5jb2RlcjsKKwlz dHJ1Y3QgZHJtX2RldmljZSAqZHJtID0gZW5jb2Rlci0+ZGV2OworCWludCByZXQ7CisKKwlkcm1f YnJpZGdlX2F0dGFjaChlbmNvZGVyLCAmZHNpbS0+YnJpZGdlLAorCQkJICBsaXN0X2ZpcnN0X2Vu dHJ5X29yX251bGwoJmVuY29kZXItPmJyaWRnZV9jaGFpbiwKKwkJCQkJCSAgIHN0cnVjdCBkcm1f YnJpZGdlLAorCQkJCQkJICAgY2hhaW5fbm9kZSksIDApOworCisJLyoKKwkgKiBUaGlzIGlzIGEg dGVtcG9yYXJ5IHNvbHV0aW9uIGFuZCBzaG91bGQgYmUgbWFkZSBieSBtb3JlIGdlbmVyaWMgd2F5 LgorCSAqCisJICogSWYgYXR0YWNoZWQgcGFuZWwgZGV2aWNlIGlzIGZvciBjb21tYW5kIG1vZGUg b25lLCBkc2kgc2hvdWxkIHJlZ2lzdGVyCisJICogVEUgaW50ZXJydXB0IGhhbmRsZXIuCisJICov CisJaWYgKCEoZGV2aWNlLT5tb2RlX2ZsYWdzICYgTUlQSV9EU0lfTU9ERV9WSURFTykpIHsKKwkJ cmV0ID0gZXh5bm9zX2RzaV9yZWdpc3Rlcl90ZV9pcnEoZHNpbSwgJmRldmljZS0+ZGV2KTsKKwkJ aWYgKHJldCkKKwkJCXJldHVybiByZXQ7CisJfQorCisJbXV0ZXhfbG9jaygmZHJtLT5tb2RlX2Nv bmZpZy5tdXRleCk7CisKKwlkc2ltLT5sYW5lcyA9IGRldmljZS0+bGFuZXM7CisJZHNpbS0+Zm9y bWF0ID0gZGV2aWNlLT5mb3JtYXQ7CisJZHNpbS0+bW9kZV9mbGFncyA9IGRldmljZS0+bW9kZV9m bGFnczsKKwlleHlub3NfZHJtX2NydGNfZ2V0X2J5X3R5cGUoZHJtLCBFWFlOT1NfRElTUExBWV9U WVBFX0xDRCktPmk4MF9tb2RlID0KKwkJCSEoZHNpbS0+bW9kZV9mbGFncyAmIE1JUElfRFNJX01P REVfVklERU8pOworCisJbXV0ZXhfdW5sb2NrKCZkcm0tPm1vZGVfY29uZmlnLm11dGV4KTsKKwor CWlmIChkcm0tPm1vZGVfY29uZmlnLnBvbGxfZW5hYmxlZCkKKwkJZHJtX2ttc19oZWxwZXJfaG90 cGx1Z19ldmVudChkcm0pOworCisJcmV0dXJuIDA7Cit9CisKK3N0YXRpYyBpbnQgX2V4eW5vc19k c2lfaG9zdF9kZXRhY2goc3RydWN0IGV4eW5vc19kc2kgKmRzaW0sCisJCQkJICAgc3RydWN0IG1p cGlfZHNpX2RldmljZSAqZGV2aWNlKQoreworCXN0cnVjdCBleHlub3NfZHNpX2VuYyAqZHNpX2Vu YyA9IGRzaW0tPnByaXY7CisJc3RydWN0IGRybV9kZXZpY2UgKmRybSA9IGRzaV9lbmMtPmVuY29k ZXIuZGV2OworCisJaWYgKGRybS0+bW9kZV9jb25maWcucG9sbF9lbmFibGVkKQorCQlkcm1fa21z X2hlbHBlcl9ob3RwbHVnX2V2ZW50KGRybSk7CisKKwlleHlub3NfZHNpX3VucmVnaXN0ZXJfdGVf aXJxKGRzaW0pOworCisJcmV0dXJuIDA7Cit9CisKIHN0YXRpYyBpbnQgZXh5bm9zX2RzaV9iaW5k KHN0cnVjdCBkZXZpY2UgKmRldiwgc3RydWN0IGRldmljZSAqbWFzdGVyLAogCQkJCXZvaWQgKmRh dGEpCiB7CiAJc3RydWN0IGV4eW5vc19kc2kgKmRzaSA9IGRldl9nZXRfZHJ2ZGF0YShkZXYpOwot CXN0cnVjdCBkcm1fZW5jb2RlciAqZW5jb2RlciA9ICZkc2ktPmVuY29kZXI7CisJc3RydWN0IGV4 eW5vc19kc2lfZW5jICpkc2lfZW5jID0gZHNpLT5wcml2OworCXN0cnVjdCBkcm1fZW5jb2RlciAq ZW5jb2RlciA9ICZkc2lfZW5jLT5lbmNvZGVyOwogCXN0cnVjdCBkcm1fZGV2aWNlICpkcm1fZGV2 ID0gZGF0YTsKIAlpbnQgcmV0OwogCkBAIC0xNzQzLDcgKzE3OTQsNyBAQCBzdGF0aWMgdm9pZCBl eHlub3NfZHNpX3VuYmluZChzdHJ1Y3QgZGV2aWNlICpkZXYsIHN0cnVjdCBkZXZpY2UgKm1hc3Rl ciwKIHsKIAlzdHJ1Y3QgZXh5bm9zX2RzaSAqZHNpID0gZGV2X2dldF9kcnZkYXRhKGRldik7CiAK LQlleHlub3NfZHNpX2F0b21pY19kaXNhYmxlKCZkc2ktPmJyaWRnZSwgTlVMTCk7CisJZHNpLT5i cmlkZ2UuZnVuY3MtPmF0b21pY19kaXNhYmxlKCZkc2ktPmJyaWRnZSwgTlVMTCk7CiAKIAltaXBp X2RzaV9ob3N0X3VucmVnaXN0ZXIoJmRzaS0+ZHNpX2hvc3QpOwogfQpAQCAtMTc1Myw2ICsxODA0 LDQwIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY29tcG9uZW50X29wcyBleHlub3NfZHNpX2NvbXBv bmVudF9vcHMgPSB7CiAJLnVuYmluZAk9IGV4eW5vc19kc2lfdW5iaW5kLAogfTsKIAorc3RhdGlj IGludCBleHlub3NfZHNpX3JlZ2lzdGVyX2hvc3Qoc3RydWN0IGV4eW5vc19kc2kgKmRzaW0pCit7 CisJc3RydWN0IGV4eW5vc19kc2lfZW5jICpkc2lfZW5jOworCisJZHNpX2VuYyA9IGRldm1fa3ph bGxvYyhkc2ltLT5kZXYsIHNpemVvZigqZHNpX2VuYyksIEdGUF9LRVJORUwpOworCWlmICghZHNp X2VuYykKKwkJcmV0dXJuIC1FTk9NRU07CisKKwlkc2ltLT5wcml2ID0gZHNpX2VuYzsKKwlkc2lt LT5icmlkZ2UucHJlX2VuYWJsZV9wcmV2X2ZpcnN0ID0gdHJ1ZTsKKworCXJldHVybiBjb21wb25l bnRfYWRkKGRzaW0tPmRldiwgJmV4eW5vc19kc2lfY29tcG9uZW50X29wcyk7Cit9CisKK3N0YXRp YyB2b2lkIGV4eW5vc19kc2lfdW5yZWdpc3Rlcl9ob3N0KHN0cnVjdCBleHlub3NfZHNpICpkc2lt KQoreworCWNvbXBvbmVudF9kZWwoZHNpbS0+ZGV2LCAmZXh5bm9zX2RzaV9jb21wb25lbnRfb3Bz KTsKK30KKworc3RhdGljIGludCBnZW5lcmljX2RzaW1fcmVnaXN0ZXJfaG9zdChzdHJ1Y3QgZXh5 bm9zX2RzaSAqZHNpbSkKK3sKKwlyZXR1cm4gbWlwaV9kc2lfaG9zdF9yZWdpc3RlcigmZHNpbS0+ ZHNpX2hvc3QpOworfQorCitzdGF0aWMgdm9pZCBnZW5lcmljX2RzaW1fdW5yZWdpc3Rlcl9ob3N0 KHN0cnVjdCBleHlub3NfZHNpICpkc2ltKQoreworCW1pcGlfZHNpX2hvc3RfdW5yZWdpc3Rlcigm ZHNpbS0+ZHNpX2hvc3QpOworfQorCitzdGF0aWMgY29uc3Qgc3RydWN0IGV4eW5vc19kc2ltX2hv c3Rfb3BzIGdlbmVyaWNfZHNpbV9ob3N0X29wcyA9IHsKKwkucmVnaXN0ZXJfaG9zdCA9IGdlbmVy aWNfZHNpbV9yZWdpc3Rlcl9ob3N0LAorCS51bnJlZ2lzdGVyX2hvc3QgPSBnZW5lcmljX2RzaW1f dW5yZWdpc3Rlcl9ob3N0LAorfTsKKwogc3RhdGljIGNvbnN0IHN0cnVjdCBkcm1fYnJpZGdlX3Rp bWluZ3MgZHNpbV9icmlkZ2VfdGltaW5nc19kZV9sb3cgPSB7CiAJLmlucHV0X2J1c19mbGFncyA9 IERSTV9CVVNfRkxBR19ERV9MT1csCiB9OwpAQCAtMTg0Nyw3ICsxOTMyLDkgQEAgc3RhdGljIGlu dCBleHlub3NfZHNpX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAJaWYgKGRz aS0+cGxhdF9kYXRhLT5od190eXBlID09IERTSU1fVFlQRV9JTVg4TU0pCiAJCWRzaS0+YnJpZGdl LnRpbWluZ3MgPSAmZHNpbV9icmlkZ2VfdGltaW5nc19kZV9sb3c7CiAKLQlyZXQgPSBjb21wb25l bnRfYWRkKGRldiwgJmV4eW5vc19kc2lfY29tcG9uZW50X29wcyk7CisJaWYgKGRzaS0+cGxhdF9k YXRhLT5ob3N0X29wcyAmJiBkc2ktPnBsYXRfZGF0YS0+aG9zdF9vcHMtPnJlZ2lzdGVyX2hvc3Qp CisJCXJldCA9IGRzaS0+cGxhdF9kYXRhLT5ob3N0X29wcy0+cmVnaXN0ZXJfaG9zdChkc2kpOwor CiAJaWYgKHJldCkKIAkJZ290byBlcnJfZGlzYWJsZV9ydW50aW1lOwogCkBAIC0xOTM4LDI0ICsy MDI1LDM2IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZGV2X3BtX29wcyBleHlub3NfZHNpX3BtX29w cyA9IHsKIAkJCQlwbV9ydW50aW1lX2ZvcmNlX3Jlc3VtZSkKIH07CiAKK3N0YXRpYyBjb25zdCBz dHJ1Y3QgZXh5bm9zX2RzaW1faG9zdF9vcHMgZXh5bm9zX2RzaV9ob3N0X29wcyA9IHsKKwkucmVn aXN0ZXJfaG9zdCA9IGV4eW5vc19kc2lfcmVnaXN0ZXJfaG9zdCwKKwkudW5yZWdpc3Rlcl9ob3N0 ID0gZXh5bm9zX2RzaV91bnJlZ2lzdGVyX2hvc3QsCisJLmF0dGFjaCA9IF9leHlub3NfZHNpX2hv c3RfYXR0YWNoLAorCS5kZXRhY2ggPSBfZXh5bm9zX2RzaV9ob3N0X2RldGFjaCwKK307CisKIHN0 YXRpYyBjb25zdCBzdHJ1Y3QgZXh5bm9zX2RzaV9wbGF0X2RhdGEgZXh5bm9zMzI1MF9kc2lfcGRh dGEgPSB7CiAJLmh3X3R5cGUgPSBEU0lNX1RZUEVfRVhZTk9TMzI1MCwKKwkuaG9zdF9vcHMgPSAm ZXh5bm9zX2RzaV9ob3N0X29wcywKIH07CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZXh5bm9zX2Rz aV9wbGF0X2RhdGEgZXh5bm9zNDIxMF9kc2lfcGRhdGEgPSB7CiAJLmh3X3R5cGUgPSBEU0lNX1RZ UEVfRVhZTk9TNDIxMCwKKwkuaG9zdF9vcHMgPSAmZXh5bm9zX2RzaV9ob3N0X29wcywKIH07CiAK IHN0YXRpYyBjb25zdCBzdHJ1Y3QgZXh5bm9zX2RzaV9wbGF0X2RhdGEgZXh5bm9zNTQxMF9kc2lf cGRhdGEgPSB7CiAJLmh3X3R5cGUgPSBEU0lNX1RZUEVfRVhZTk9TNTQxMCwKKwkuaG9zdF9vcHMg PSAmZXh5bm9zX2RzaV9ob3N0X29wcywKIH07CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZXh5bm9z X2RzaV9wbGF0X2RhdGEgZXh5bm9zNTQyMl9kc2lfcGRhdGEgPSB7CiAJLmh3X3R5cGUgPSBEU0lN X1RZUEVfRVhZTk9TNTQyMiwKKwkuaG9zdF9vcHMgPSAmZXh5bm9zX2RzaV9ob3N0X29wcywKIH07 CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZXh5bm9zX2RzaV9wbGF0X2RhdGEgZXh5bm9zNTQzM19k c2lfcGRhdGEgPSB7CiAJLmh3X3R5cGUgPSBEU0lNX1RZUEVfRVhZTk9TNTQzMywKKwkuaG9zdF9v cHMgPSAmZXh5bm9zX2RzaV9ob3N0X29wcywKIH07CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgb2Zf 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cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Jan 2023 06:47:08 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Robert Foss , Laurent Pinchart , Marek Vasut Subject: [PATCH v12 12/18] drm: exynos: dsi: Consolidate component and bridge Date: Thu, 26 Jan 2023 20:14:21 +0530 Message-Id: <20230126144427.607098-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230126144427.607098-1-jagan@amarulasolutions.com> References: <20230126144427.607098-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" DSI host registration, attach and detach operations are quite different for the component and bridge-based DRM drivers.  Supporting generic bridge driver to use both component and bridge based DRM drivers can be tricky and would require additional host related operation hooks. Add host operation hooks for registering and unregistering Exynos and generic drivers, where Exynos hooks are used in existing Exynos component based DRM drivers and generic hooks are used in i.MX8M bridge based DRM drivers.  Add host attach and detach operation hooks for Exynos component DRM drivers and those get invoked while DSI core host attach and detach gets called. Reviewed-by: Marek Vasut Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v12: - fix unneeded decleration - collect RB from Marek Changes for v11: - none Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 169 +++++++++++++++++++----- 1 file changed, 134 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 9459c138d0e0..488fae218205 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -283,10 +283,10 @@ struct exynos_dsi_driver_data { struct exynos_dsi_plat_data { enum exynos_dsi_type hw_type; + const struct exynos_dsim_host_ops *host_ops; }; struct exynos_dsi { - struct drm_encoder encoder; struct mipi_dsi_host dsi_host; struct drm_bridge bridge; struct drm_bridge *out_bridge; @@ -316,6 +316,19 @@ struct exynos_dsi { const struct exynos_dsi_driver_data *driver_data; const struct exynos_dsi_plat_data *plat_data; + + void *priv; +}; + +struct exynos_dsim_host_ops { + int (*register_host)(struct exynos_dsi *dsim); + void (*unregister_host)(struct exynos_dsi *dsim); + int (*attach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); + int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); +}; + +struct exynos_dsi_enc { + struct drm_encoder encoder; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -1320,7 +1333,8 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) { struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; - struct drm_encoder *encoder = &dsi->encoder; + struct exynos_dsi_enc *dsi_enc = dsi->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) exynos_drm_crtc_te_handler(encoder->crtc); @@ -1589,9 +1603,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; struct device *dev = dsi->dev; - struct drm_encoder *encoder = &dsi->encoder; - struct drm_device *drm = encoder->dev; int ret; dsi->out_bridge = devm_drm_of_dsi_get_bridge(dev, dev->of_node, 1, 0); @@ -1605,35 +1618,15 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, drm_bridge_add(&dsi->bridge); - drm_bridge_attach(encoder, &dsi->bridge, - list_first_entry_or_null(&encoder->bridge_chain, - struct drm_bridge, - chain_node), 0); - - /* - * This is a temporary solution and should be made by more generic way. - * - * If attached panel device is for command mode one, dsi should register - * TE interrupt handler. - */ - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { - ret = exynos_dsi_register_te_irq(dsi, &device->dev); - if (ret) + if (pdata->host_ops && pdata->host_ops->attach) { + ret = pdata->host_ops->attach(dsi, device); + if (ret < 0) return ret; } - mutex_lock(&drm->mode_config.mutex); - dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); - - mutex_unlock(&drm->mode_config.mutex); - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); return 0; } @@ -1642,12 +1635,14 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); - struct drm_device *drm = dsi->encoder.dev; - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; + int ret; - exynos_dsi_unregister_te_irq(dsi); + if (pdata->host_ops && pdata->host_ops->detach) { + ret = pdata->host_ops->detach(dsi, device); + if (ret < 0) + return ret; + } drm_bridge_remove(&dsi->bridge); @@ -1721,11 +1716,67 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) return 0; } +static int _exynos_dsi_host_attach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; + struct drm_device *drm = encoder->dev; + int ret; + + drm_bridge_attach(encoder, &dsim->bridge, + list_first_entry_or_null(&encoder->bridge_chain, + struct drm_bridge, + chain_node), 0); + + /* + * This is a temporary solution and should be made by more generic way. + * + * If attached panel device is for command mode one, dsi should register + * TE interrupt handler. + */ + if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { + ret = exynos_dsi_register_te_irq(dsim, &device->dev); + if (ret) + return ret; + } + + mutex_lock(&drm->mode_config.mutex); + + dsim->lanes = device->lanes; + dsim->format = device->format; + dsim->mode_flags = device->mode_flags; + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = + !(dsim->mode_flags & MIPI_DSI_MODE_VIDEO); + + mutex_unlock(&drm->mode_config.mutex); + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + return 0; +} + +static int _exynos_dsi_host_detach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_device *drm = dsi_enc->encoder.dev; + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + exynos_dsi_unregister_te_irq(dsim); + + return 0; +} + static int exynos_dsi_bind(struct device *dev, struct device *master, void *data) { struct exynos_dsi *dsi = dev_get_drvdata(dev); - struct drm_encoder *encoder = &dsi->encoder; + struct exynos_dsi_enc *dsi_enc = dsi->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; struct drm_device *drm_dev = data; int ret; @@ -1743,7 +1794,7 @@ static void exynos_dsi_unbind(struct device *dev, struct device *master, { struct exynos_dsi *dsi = dev_get_drvdata(dev); - exynos_dsi_atomic_disable(&dsi->bridge, NULL); + dsi->bridge.funcs->atomic_disable(&dsi->bridge, NULL); mipi_dsi_host_unregister(&dsi->dsi_host); } @@ -1753,6 +1804,40 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static int exynos_dsi_register_host(struct exynos_dsi *dsim) +{ + struct exynos_dsi_enc *dsi_enc; + + dsi_enc = devm_kzalloc(dsim->dev, sizeof(*dsi_enc), GFP_KERNEL); + if (!dsi_enc) + return -ENOMEM; + + dsim->priv = dsi_enc; + dsim->bridge.pre_enable_prev_first = true; + + return component_add(dsim->dev, &exynos_dsi_component_ops); +} + +static void exynos_dsi_unregister_host(struct exynos_dsi *dsim) +{ + component_del(dsim->dev, &exynos_dsi_component_ops); +} + +static int generic_dsim_register_host(struct exynos_dsi *dsim) +{ + return mipi_dsi_host_register(&dsim->dsi_host); +} + +static void generic_dsim_unregister_host(struct exynos_dsi *dsim) +{ + mipi_dsi_host_unregister(&dsim->dsi_host); +} + +static const struct exynos_dsim_host_ops generic_dsim_host_ops = { + .register_host = generic_dsim_register_host, + .unregister_host = generic_dsim_unregister_host, +}; + static const struct drm_bridge_timings dsim_bridge_timings_de_low = { .input_bus_flags = DRM_BUS_FLAG_DE_LOW, }; @@ -1847,7 +1932,9 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) dsi->bridge.timings = &dsim_bridge_timings_de_low; - ret = component_add(dev, &exynos_dsi_component_ops); + if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host) + ret = dsi->plat_data->host_ops->register_host(dsi); + if (ret) goto err_disable_runtime; @@ -1938,24 +2025,36 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { + .register_host = exynos_dsi_register_host, + .unregister_host = exynos_dsi_unregister_host, + .attach = _exynos_dsi_host_attach, + .detach = _exynos_dsi_host_detach, +}; + static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS3250, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos4210_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS4210, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5410_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5410, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5422_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5422, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5433_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5433, + .host_ops = &exynos_dsi_host_ops, }; static const struct of_device_id exynos_dsi_of_match[] = { -- 2.25.1