diff for duplicates of <20230128172856.3814-1-jszhang@kernel.org> diff --git a/a/1.txt b/N1/1.txt index 04e31df..dd11292 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -53,9 +53,9 @@ Since v1 - add one patch to switch to relative alternative entries - add patches to patch vdso -[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/ -[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/ -[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko at sntech.de/ +[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ +[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ +[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko@sntech.de/ @@ -98,3 +98,9 @@ Jisheng Zhang (11): -- 2.38.1 + + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N1/content_digest index 57b32b0..f179124 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,7 +1,18 @@ "From\0Jisheng Zhang <jszhang@kernel.org>\0" "Subject\0[PATCH v5 00/13] riscv: improve boot time isa extensions handling\0" "Date\0Sun, 29 Jan 2023 01:28:43 +0800\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Anup Patel <anup@brainfault.org> + Atish Patra <atishp@atishpatra.org> + Heiko Stuebner <heiko@sntech.de> + Andrew Jones <ajones@ventanamicro.com> + " Conor Dooley <conor.dooley@microchip.com>\0" + "Cc\0linux-riscv@lists.infradead.org" + linux-kernel@vger.kernel.org + kvm@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" "\00:1\0" "b\0" "Generally, riscv ISA extensions are fixed for any specific hardware\n" @@ -59,9 +70,9 @@ " - add one patch to switch to relative alternative entries\n" " - add patches to patch vdso\n" "\n" - "[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/\n" - "[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/\n" - "[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko at sntech.de/\n" + "[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/\n" + "[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/\n" + "[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko@sntech.de/\n" "\n" "\n" "\n" @@ -103,6 +114,12 @@ " 17 files changed, 176 insertions(+), 164 deletions(-)\n" "\n" "-- \n" - 2.38.1 + "2.38.1\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -a7de9b1dcafde1a1c770afc922cbbbe8787befbd61eee57f8a61d7a3219a9d4b +c72f009490fd41b107b5a232fa3165897de71347898d48a164b7645392c31216
diff --git a/a/1.txt b/N2/1.txt index 04e31df..d1c44b8 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -53,9 +53,9 @@ Since v1 - add one patch to switch to relative alternative entries - add patches to patch vdso -[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/ -[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/ -[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko at sntech.de/ +[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ +[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ +[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko@sntech.de/ diff --git a/a/content_digest b/N2/content_digest index 57b32b0..14a7abd 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,7 +1,18 @@ "From\0Jisheng Zhang <jszhang@kernel.org>\0" "Subject\0[PATCH v5 00/13] riscv: improve boot time isa extensions handling\0" "Date\0Sun, 29 Jan 2023 01:28:43 +0800\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Anup Patel <anup@brainfault.org> + Atish Patra <atishp@atishpatra.org> + Heiko Stuebner <heiko@sntech.de> + Andrew Jones <ajones@ventanamicro.com> + " Conor Dooley <conor.dooley@microchip.com>\0" + "Cc\0linux-riscv@lists.infradead.org" + linux-kernel@vger.kernel.org + kvm@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" "\00:1\0" "b\0" "Generally, riscv ISA extensions are fixed for any specific hardware\n" @@ -59,9 +70,9 @@ " - add one patch to switch to relative alternative entries\n" " - add patches to patch vdso\n" "\n" - "[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/\n" - "[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/\n" - "[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko at sntech.de/\n" + "[1]https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/\n" + "[2]https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/\n" + "[3]https://lore.kernel.org/linux-riscv/20221130225614.1594256-1-heiko@sntech.de/\n" "\n" "\n" "\n" @@ -105,4 +116,4 @@ "-- \n" 2.38.1 -a7de9b1dcafde1a1c770afc922cbbbe8787befbd61eee57f8a61d7a3219a9d4b +123cdd316afa187bb8cea2ce8fc1e197c04d5244fd526a3073543e75bf009cfe
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.