diff for duplicates of <20230128172856.3814-6-jszhang@kernel.org> diff --git a/a/1.txt b/N1/1.txt index 4868417..03b97a8 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -27,8 +27,8 @@ riscv_has_extension_*() helpers, which work like static branches but are patched using alternatives, thus the metadata can be freed after patching. -Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/ [1] -Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/ [2] +Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ [1] +Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ [2] Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> @@ -93,3 +93,9 @@ index 8e0ee841fa77..411ef0fb5c4b 100644 #define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext) -- 2.38.1 + + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N1/content_digest index e1f8506..b9445a3 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,7 +2,18 @@ "From\0Jisheng Zhang <jszhang@kernel.org>\0" "Subject\0[PATCH v5 05/13] riscv: introduce riscv_has_extension_[un]likely()\0" "Date\0Sun, 29 Jan 2023 01:28:48 +0800\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Anup Patel <anup@brainfault.org> + Atish Patra <atishp@atishpatra.org> + Heiko Stuebner <heiko@sntech.de> + Andrew Jones <ajones@ventanamicro.com> + " Conor Dooley <conor.dooley@microchip.com>\0" + "Cc\0linux-riscv@lists.infradead.org" + linux-kernel@vger.kernel.org + kvm@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" "\00:1\0" "b\0" "Generally, riscv ISA extensions are fixed for any specific hardware\n" @@ -34,8 +45,8 @@ "are patched using alternatives, thus the metadata can be freed after\n" "patching.\n" "\n" - "Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/ [1]\n" - "Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/ [2]\n" + "Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ [1]\n" + "Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ [2]\n" "Signed-off-by: Jisheng Zhang <jszhang@kernel.org>\n" "Reviewed-by: Andrew Jones <ajones@ventanamicro.com>\n" "Acked-by: Conor Dooley <conor.dooley@microchip.com>\n" @@ -99,6 +110,12 @@ " \n" " #define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext)\n" "-- \n" - 2.38.1 + "2.38.1\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -321c15665f86b43f60c15d666d04b7348c77ed94fe14cdff99b13a87ca3531e3 +888f7606f0a75db661233cac4d950c68f3fb0a004e69f9b98658ee19fc420f82
diff --git a/a/1.txt b/N2/1.txt index 4868417..35a2a96 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -27,8 +27,8 @@ riscv_has_extension_*() helpers, which work like static branches but are patched using alternatives, thus the metadata can be freed after patching. -Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/ [1] -Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/ [2] +Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ [1] +Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ [2] Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> diff --git a/a/content_digest b/N2/content_digest index e1f8506..6563cca 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,7 +2,18 @@ "From\0Jisheng Zhang <jszhang@kernel.org>\0" "Subject\0[PATCH v5 05/13] riscv: introduce riscv_has_extension_[un]likely()\0" "Date\0Sun, 29 Jan 2023 01:28:48 +0800\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Albert Ou <aou@eecs.berkeley.edu> + Anup Patel <anup@brainfault.org> + Atish Patra <atishp@atishpatra.org> + Heiko Stuebner <heiko@sntech.de> + Andrew Jones <ajones@ventanamicro.com> + " Conor Dooley <conor.dooley@microchip.com>\0" + "Cc\0linux-riscv@lists.infradead.org" + linux-kernel@vger.kernel.org + kvm@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" "\00:1\0" "b\0" "Generally, riscv ISA extensions are fixed for any specific hardware\n" @@ -34,8 +45,8 @@ "are patched using alternatives, thus the metadata can be freed after\n" "patching.\n" "\n" - "Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel at sholland.org/ [1]\n" - "Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland at arm.com/ [2]\n" + "Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ [1]\n" + "Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ [2]\n" "Signed-off-by: Jisheng Zhang <jszhang@kernel.org>\n" "Reviewed-by: Andrew Jones <ajones@ventanamicro.com>\n" "Acked-by: Conor Dooley <conor.dooley@microchip.com>\n" @@ -101,4 +112,4 @@ "-- \n" 2.38.1 -321c15665f86b43f60c15d666d04b7348c77ed94fe14cdff99b13a87ca3531e3 +84ce9b4dfea66fb1815d97ee956340ae33b170984fabffe1adc10fd42d2cbda2
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