From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9C34D7F for ; Tue, 7 Feb 2023 01:18:01 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1F74C13D5; Mon, 6 Feb 2023 17:18:43 -0800 (PST) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1A6243F71E; Mon, 6 Feb 2023 17:17:58 -0800 (PST) Date: Tue, 7 Feb 2023 01:16:08 +0000 From: Andre Przywara To: Andreas Feldner Cc: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: allwinner: minimize irq debounce filter per default Message-ID: <20230207011608.2ce24d17@slackpad.lan> In-Reply-To: References: Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Mon, 6 Feb 2023 20:51:50 +0100 Andreas Feldner wrote: Hi Andreas, thanks for taking care about this board and sending patches! > The SoC features debounce logic for external interrupts. Per default, > this is based on a 32kHz oscillator, in effect filtering away multiple > interrupts separated by less than roughly 100=C3=AF=C2=BF=C2=BDs. >=20 > This patch sets different defaults for this filter for this board: > PG is connected to non-mechanical components, without any risk for > showing bounces. PA is mostly exposed to GPIO pins, however the > existence of a debounce filter is undesirable as well if electronic > components are connected. So how do you know if that's the case? It seems to be quite normal to just connect mechanical switches to GPIO pins. If you are trying to fix a particular issue you encountered, please describe that here, and say how (or at least that) the patch fixes it. And I would suggest to treat port G and port A differently. If you need a lower debounce threshold for port A, you can apply a DT overlay in U-Boot, just for your board. > Additionally, the clock-frequency attribute is added for each of > the 4 cores to eliminate the kernel error message on boot, that > the attribute is missing. >=20 > Signed-off-by: Andreas Feldner > --- > .../dts/sun8i-h2-plus-bananapi-m2-zero.dts | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) >=20 > diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/= arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts > index d729b7c705db..1fc0d5d1e51a 100644 > --- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts > +++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts > @@ -113,6 +113,22 @@ wifi_pwrseq: wifi_pwrseq { > =20 > &cpu0 { > cpu-supply =3D <®_vdd_cpux>; > + clock-frequency =3D <1296000000>; I see where you are coming from, this is really an unnecessary warning message. However this message should be really removed from the kernel instead of adding some rather meaningless value here. The current DT spec marks this property as required, though, so I added a PR there to get this fixed: https://github.com/devicetree-org/devicetree-specification/pull/61 Once this is through, we can try to remove the kernel message. > +}; > + > +&cpu1 { > + cpu-supply =3D <®_vdd_cpux>; I don't think we need this for every core? > + clock-frequency =3D <1296000000>; > +}; > + > +&cpu2 { > + cpu-supply =3D <®_vdd_cpux>; > + clock-frequency =3D <1296000000>; > +}; > + > +&cpu3 { > + cpu-supply =3D <®_vdd_cpux>; > + clock-frequency =3D <1296000000>; > }; > =20 > &de { > @@ -193,6 +209,8 @@ bluetooth { > }; > =20 > &pio { > + /* 1=C3=AF=C2=BF=C2=BDs debounce filter on both IRQ banks */ Is that supposed to be in UTF-8? It seems to have got lost in translation, or is that just me? > + input-debounce =3D <1 1>; As mentioned above, I am not so sure this is generic enough to put it here for PA. And what is the significance of "1 us", in particular? Is that just the smallest value? Cheers, Andre > gpio-line-names =3D > /* PA */ > "CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15", From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5CE5C05027 for ; Tue, 7 Feb 2023 01:19:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bcxlJN/Jg9GDFOd00YEcPhJqSWKycPAHomAmg763D/Q=; b=dNh6CtDjE837iJ Iuaqr3LWEcecp9HHo+Zn9DWSVZkE/AkjI9ankbRzXJNnFYsqWLdD5kfi3QRchHhGSSWkgmUbRf2/F uPV522bQ/JhofzGB4Xl6t+cfM9AvSLzdqteV4Cff4EcEeKpQ451mIqXGkqXptG0vSzDg55FcsvbIn k1MD3KuNtKRKCfmY9aPv0GtGEc38fhv3ywBw4/ObxOMWJnoPiOuqoyS3zxEM/H7K3yIp7Tuu7mDPh Or9/dCZG7R+jAKBkn6csHptf0Fe1SWlj6nRMlcgAwquqh2fE0NlMJbq5odkAc+LIZKwWhEQXNW80Z bofeXMND9jz88VH0LErg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPCcc-00ALoR-Hu; Tue, 07 Feb 2023 01:18:10 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPCcY-00ALn2-Mn for linux-arm-kernel@lists.infradead.org; Tue, 07 Feb 2023 01:18:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1F74C13D5; Mon, 6 Feb 2023 17:18:43 -0800 (PST) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1A6243F71E; Mon, 6 Feb 2023 17:17:58 -0800 (PST) Date: Tue, 7 Feb 2023 01:16:08 +0000 From: Andre Przywara To: Andreas Feldner Cc: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: allwinner: minimize irq debounce filter per default Message-ID: <20230207011608.2ce24d17@slackpad.lan> In-Reply-To: References: Organization: Arm Ltd. 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