From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 521A57F4 for ; Sat, 11 Feb 2023 01:02:32 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8A80AC14; Fri, 10 Feb 2023 17:03:07 -0800 (PST) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 011593F703; Fri, 10 Feb 2023 17:02:22 -0800 (PST) Date: Sat, 11 Feb 2023 01:00:19 +0000 From: Andre Przywara To: Marc Zyngier Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandru Elisei , Catalin Marinas , Christoffer Dall , Ganapatrao Kulkarni , Russell King , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: Re: [PATCH 02/18] KVM: arm64: Use the S2 MMU context to iterate over S2 table Message-ID: <20230211010019.1ccb6855@slackpad.lan> In-Reply-To: <20230209175820.1939006-3-maz@kernel.org> References: <20230209175820.1939006-1-maz@kernel.org> <20230209175820.1939006-3-maz@kernel.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 9 Feb 2023 17:58:04 +0000 Marc Zyngier wrote: > Most of our S2 helpers take a kvm_s2_mmu pointer, but quickly > revert back to using the kvm structure. By doing so, we lose > track of which S2 MMU context we were initially using, and fallback > to the "canonical" context. > > If we were trying to unmap a S2 context managed by a guest hypervisor, > we end-up parsing the wrong set of page tables, and bad stuff happens > (as this is often happening on the back of a trapped TLBI from the > guest hypervisor). > > Instead, make sure we always use the provided MMU context all the way. > This has no impact on non-NV, as we always pass the canonical MMU > context. Indeed this just changes stage2_apply_range() and all its callers, in a manner that shouldn't change the current behaviour, but preserves the S2 MMU passed in: > Signed-off-by: Marc Zyngier Reviewed-by: Andre Przywara Cheers, Andre > --- > arch/arm64/kvm/mmu.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > index a3ee3b605c9b..892d6a5fb2f5 100644 > --- a/arch/arm64/kvm/mmu.c > +++ b/arch/arm64/kvm/mmu.c > @@ -46,16 +46,17 @@ static phys_addr_t stage2_range_addr_end(phys_addr_t addr, phys_addr_t end) > * long will also starve other vCPUs. We have to also make sure that the page > * tables are not freed while we released the lock. > */ > -static int stage2_apply_range(struct kvm *kvm, phys_addr_t addr, > +static int stage2_apply_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, > phys_addr_t end, > int (*fn)(struct kvm_pgtable *, u64, u64), > bool resched) > { > + struct kvm *kvm = kvm_s2_mmu_to_kvm(mmu); > int ret; > u64 next; > > do { > - struct kvm_pgtable *pgt = kvm->arch.mmu.pgt; > + struct kvm_pgtable *pgt = mmu->pgt; > if (!pgt) > return -EINVAL; > > @@ -71,8 +72,8 @@ static int stage2_apply_range(struct kvm *kvm, phys_addr_t addr, > return ret; > } > > -#define stage2_apply_range_resched(kvm, addr, end, fn) \ > - stage2_apply_range(kvm, addr, end, fn, true) > +#define stage2_apply_range_resched(mmu, addr, end, fn) \ > + stage2_apply_range(mmu, addr, end, fn, true) > > static bool memslot_is_logging(struct kvm_memory_slot *memslot) > { > @@ -235,7 +236,7 @@ static void __unmap_stage2_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 > > lockdep_assert_held_write(&kvm->mmu_lock); > WARN_ON(size & ~PAGE_MASK); > - WARN_ON(stage2_apply_range(kvm, start, end, kvm_pgtable_stage2_unmap, > + WARN_ON(stage2_apply_range(mmu, start, end, kvm_pgtable_stage2_unmap, > may_block)); > } > > @@ -250,7 +251,7 @@ static void stage2_flush_memslot(struct kvm *kvm, > phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; > phys_addr_t end = addr + PAGE_SIZE * memslot->npages; > > - stage2_apply_range_resched(kvm, addr, end, kvm_pgtable_stage2_flush); > + stage2_apply_range_resched(&kvm->arch.mmu, addr, end, kvm_pgtable_stage2_flush); > } > > /** > @@ -934,8 +935,7 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, > */ > static void stage2_wp_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end) > { > - struct kvm *kvm = kvm_s2_mmu_to_kvm(mmu); > - stage2_apply_range_resched(kvm, addr, end, kvm_pgtable_stage2_wrprotect); > + stage2_apply_range_resched(mmu, addr, end, kvm_pgtable_stage2_wrprotect); > } > > /** From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A49EC05027 for ; Sat, 11 Feb 2023 01:03:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AzxNmoqaFT6KQrOxRTq15/XhVb2gX60hQDBhhi13Fxg=; b=FJb67QYMrSXXc9 kuh+vKI164mZQ6hmMH8L6UW2eM+UnPSY8cH/OyO+HGIHDFPegGCYRoEx0Rh4g77650z6epe/xg7g7 AL0R99EnU4vlzHGQrOyqYNSUQlrOxEarfkEKMo47tc8gBI0BSG6Ws0M0OT/vMqc88cxYuhWN9Wo9X nNfEt9DcQi9r+I2TFJBUrh4STzv1ULOz9NPy4GaxVxz+yIs+nfDLrSZyt24wxrC8/wCIzyIHZa0HS HJaXuOqtR92S7u8ZqsawM5CpyM6qFSRuVRa65/GXiDFNMdwNkQaBfQ/VQ4j8LkgHWccGKViz40seh ET1wMzlWsmEhUI8QM8Cw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQeHi-008BYS-RM; Sat, 11 Feb 2023 01:02:34 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pQeHe-008BWh-DH for linux-arm-kernel@lists.infradead.org; Sat, 11 Feb 2023 01:02:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8A80AC14; Fri, 10 Feb 2023 17:03:07 -0800 (PST) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 011593F703; Fri, 10 Feb 2023 17:02:22 -0800 (PST) Date: Sat, 11 Feb 2023 01:00:19 +0000 From: Andre Przywara To: Marc Zyngier Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandru Elisei , Catalin Marinas , Christoffer Dall , Ganapatrao Kulkarni , Russell King , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: Re: [PATCH 02/18] KVM: arm64: Use the S2 MMU context to iterate over S2 table Message-ID: <20230211010019.1ccb6855@slackpad.lan> In-Reply-To: <20230209175820.1939006-3-maz@kernel.org> References: <20230209175820.1939006-1-maz@kernel.org> <20230209175820.1939006-3-maz@kernel.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230210_170230_570334_10CE70AF X-CRM114-Status: GOOD ( 21.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 9 Feb 2023 17:58:04 +0000 Marc Zyngier wrote: > Most of our S2 helpers take a kvm_s2_mmu pointer, but quickly > revert back to using the kvm structure. By doing so, we lose > track of which S2 MMU context we were initially using, and fallback > to the "canonical" context. > > If we were trying to unmap a S2 context managed by a guest hypervisor, > we end-up parsing the wrong set of page tables, and bad stuff happens > (as this is often happening on the back of a trapped TLBI from the > guest hypervisor). > > Instead, make sure we always use the provided MMU context all the way. > This has no impact on non-NV, as we always pass the canonical MMU > context. Indeed this just changes stage2_apply_range() and all its callers, in a manner that shouldn't change the current behaviour, but preserves the S2 MMU passed in: > Signed-off-by: Marc Zyngier Reviewed-by: Andre Przywara Cheers, Andre > --- > arch/arm64/kvm/mmu.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > index a3ee3b605c9b..892d6a5fb2f5 100644 > --- a/arch/arm64/kvm/mmu.c > +++ b/arch/arm64/kvm/mmu.c > @@ -46,16 +46,17 @@ static phys_addr_t stage2_range_addr_end(phys_addr_t addr, phys_addr_t end) > * long will also starve other vCPUs. We have to also make sure that the page > * tables are not freed while we released the lock. > */ > -static int stage2_apply_range(struct kvm *kvm, phys_addr_t addr, > +static int stage2_apply_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, > phys_addr_t end, > int (*fn)(struct kvm_pgtable *, u64, u64), > bool resched) > { > + struct kvm *kvm = kvm_s2_mmu_to_kvm(mmu); > int ret; > u64 next; > > do { > - struct kvm_pgtable *pgt = kvm->arch.mmu.pgt; > + struct kvm_pgtable *pgt = mmu->pgt; > if (!pgt) > return -EINVAL; > > @@ -71,8 +72,8 @@ static int stage2_apply_range(struct kvm *kvm, phys_addr_t addr, > return ret; > } > > -#define stage2_apply_range_resched(kvm, addr, end, fn) \ > - stage2_apply_range(kvm, addr, end, fn, true) > +#define stage2_apply_range_resched(mmu, addr, end, fn) \ > + stage2_apply_range(mmu, addr, end, fn, true) > > static bool memslot_is_logging(struct kvm_memory_slot *memslot) > { > @@ -235,7 +236,7 @@ static void __unmap_stage2_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 > > lockdep_assert_held_write(&kvm->mmu_lock); > WARN_ON(size & ~PAGE_MASK); > - WARN_ON(stage2_apply_range(kvm, start, end, kvm_pgtable_stage2_unmap, > + WARN_ON(stage2_apply_range(mmu, start, end, kvm_pgtable_stage2_unmap, > may_block)); > } > > @@ -250,7 +251,7 @@ static void stage2_flush_memslot(struct kvm *kvm, > phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; > phys_addr_t end = addr + PAGE_SIZE * memslot->npages; > > - stage2_apply_range_resched(kvm, addr, end, kvm_pgtable_stage2_flush); > + stage2_apply_range_resched(&kvm->arch.mmu, addr, end, kvm_pgtable_stage2_flush); > } > > /** > @@ -934,8 +935,7 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, > */ > static void stage2_wp_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end) > { > - struct kvm *kvm = kvm_s2_mmu_to_kvm(mmu); > - stage2_apply_range_resched(kvm, addr, end, kvm_pgtable_stage2_wrprotect); > + stage2_apply_range_resched(mmu, addr, end, kvm_pgtable_stage2_wrprotect); > } > > /** _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel