[krzk-github:n/audio-wsa884x-on-top-of-audio-wsa881x-gpio 396/614] drivers/clk/qcom/clk-cpu-8996.c:532:2: warning: unannotated fall-through between switch labels

[kernel test robot <lkp@intel.com>]

tree:   https://github.com/krzk/linux n/audio-wsa884x-on-top-of-audio-wsa881x-gpio
head:   ab3b1a5e70c27be92944b0001d5432866887ccc0
commit: 27dbfad00558825ed04e50b4fc1cafb23192b3c1 [396/614] clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb
config: arm64-randconfig-r034-20230217 (https://download.01.org/0day-ci/archive/20230219/202302190012.dSSrrBUS-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project db89896bbbd2251fff457699635acbbedeead27f)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/krzk/linux/commit/27dbfad00558825ed04e50b4fc1cafb23192b3c1
        git remote add krzk-github https://github.com/krzk/linux
        git fetch --no-tags krzk-github n/audio-wsa884x-on-top-of-audio-wsa881x-gpio
        git checkout 27dbfad00558825ed04e50b4fc1cafb23192b3c1
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/clk/qcom/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202302190012.dSSrrBUS-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/clk/qcom/clk-cpu-8996.c:532:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
           default:
           ^
   drivers/clk/qcom/clk-cpu-8996.c:532:2: note: insert 'break;' to avoid fall-through
           default:
           ^
           break; 
   1 warning generated.


vim +532 drivers/clk/qcom/clk-cpu-8996.c

03e342dc45c9ec Loic Poulain     2020-07-03  503  
03e342dc45c9ec Loic Poulain     2020-07-03  504  static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event,
03e342dc45c9ec Loic Poulain     2020-07-03  505  			       void *data)
03e342dc45c9ec Loic Poulain     2020-07-03  506  {
9a9f5f9a5a0ca3 Yassine Oudjana  2022-06-21  507  	struct clk_cpu_8996_pmux *cpuclk = to_clk_cpu_8996_pmux_nb(nb);
03e342dc45c9ec Loic Poulain     2020-07-03  508  	struct clk_notifier_data *cnd = data;
03e342dc45c9ec Loic Poulain     2020-07-03  509  
03e342dc45c9ec Loic Poulain     2020-07-03  510  	switch (event) {
03e342dc45c9ec Loic Poulain     2020-07-03  511  	case PRE_RATE_CHANGE:
03e342dc45c9ec Loic Poulain     2020-07-03  512  		qcom_cpu_clk_msm8996_acd_init(base);
27dbfad0055882 Dmitry Baryshkov 2022-07-28  513  
27dbfad0055882 Dmitry Baryshkov 2022-07-28  514  		/*
27dbfad0055882 Dmitry Baryshkov 2022-07-28  515  		 * Avoid overvolting. clk_core_set_rate_nolock() walks from top
27dbfad0055882 Dmitry Baryshkov 2022-07-28  516  		 * to bottom, so it will change the rate of the PLL before
27dbfad0055882 Dmitry Baryshkov 2022-07-28  517  		 * chaging the parent of PMUX. This can result in pmux getting
27dbfad0055882 Dmitry Baryshkov 2022-07-28  518  		 * clocked twice the expected rate.
27dbfad0055882 Dmitry Baryshkov 2022-07-28  519  		 *
27dbfad0055882 Dmitry Baryshkov 2022-07-28  520  		 * Manually switch to PLL/2 here.
27dbfad0055882 Dmitry Baryshkov 2022-07-28  521  		 */
27dbfad0055882 Dmitry Baryshkov 2022-07-28  522  		if (cnd->new_rate < DIV_2_THRESHOLD &&
27dbfad0055882 Dmitry Baryshkov 2022-07-28  523  		    cnd->old_rate > DIV_2_THRESHOLD)
27dbfad0055882 Dmitry Baryshkov 2022-07-28  524  			clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, SMUX_INDEX);
27dbfad0055882 Dmitry Baryshkov 2022-07-28  525  
03e342dc45c9ec Loic Poulain     2020-07-03  526  		break;
27dbfad0055882 Dmitry Baryshkov 2022-07-28  527  	case ABORT_RATE_CHANGE:
27dbfad0055882 Dmitry Baryshkov 2022-07-28  528  		/* Revert manual change */
27dbfad0055882 Dmitry Baryshkov 2022-07-28  529  		if (cnd->new_rate < DIV_2_THRESHOLD &&
27dbfad0055882 Dmitry Baryshkov 2022-07-28  530  		    cnd->old_rate > DIV_2_THRESHOLD)
27dbfad0055882 Dmitry Baryshkov 2022-07-28  531  			clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, ACD_INDEX);
03e342dc45c9ec Loic Poulain     2020-07-03 @532  	default:
03e342dc45c9ec Loic Poulain     2020-07-03  533  		break;
03e342dc45c9ec Loic Poulain     2020-07-03  534  	}
03e342dc45c9ec Loic Poulain     2020-07-03  535  
27dbfad0055882 Dmitry Baryshkov 2022-07-28  536  	return NOTIFY_OK;
03e342dc45c9ec Loic Poulain     2020-07-03  537  };
03e342dc45c9ec Loic Poulain     2020-07-03  538  

:::::: The code at line 532 was first introduced by commit
:::::: 03e342dc45c9ec07303953d4e4af11879be36609 clk: qcom: Add CPU clock driver for msm8996

:::::: TO: Loic Poulain <loic.poulain@linaro.org>
:::::: CC: Stephen Boyd <sboyd@kernel.org>

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests