diff for duplicates of <20230221190916.572454-2-ajones@ventanamicro.com> diff --git a/a/1.txt b/N1/1.txt index 16041f1..5a69e4a 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -43,3 +43,9 @@ index 993a44a8fdac..b8c55fb3ab2c 100644 #define __ALTERNATIVE_CFG(...) ALTERNATIVE_CFG __VA_ARGS__ -- 2.39.1 + + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N1/content_digest index 13328c9..b547639 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,7 +2,20 @@ "From\0Andrew Jones <ajones@ventanamicro.com>\0" "Subject\0[PATCH v5 1/8] RISC-V: alternatives: Support patching multiple insns in assembly\0" "Date\0Tue, 21 Feb 2023 20:09:09 +0100\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0linux-riscv@lists.infradead.org" + devicetree@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" + "Cc\0'Rob Herring ' <robh@kernel.org>" + 'Jisheng Zhang ' <jszhang@kernel.org> + 'Anup Patel ' <apatel@ventanamicro.com> + 'Conor Dooley ' <conor.dooley@microchip.com> + 'Krzysztof Kozlowski ' <krzysztof.kozlowski+dt@linaro.org> + 'Heiko Stuebner ' <heiko@sntech.de> + 'Paul Walmsley ' <paul.walmsley@sifive.com> + 'Palmer Dabbelt ' <palmer@dabbelt.com> + 'Albert Ou ' <aou@eecs.berkeley.edu> + 'Ben Dooks ' <ben.dooks@codethink.co.uk> + " 'Atish Patra ' <atishp@rivosinc.com>\0" "\00:1\0" "b\0" "As pointed out in commit d374a16539b1 (\"RISC-V: fix compile error\n" @@ -49,6 +62,12 @@ " \n" " #define __ALTERNATIVE_CFG(...)\t\tALTERNATIVE_CFG __VA_ARGS__\n" "-- \n" - 2.39.1 + "2.39.1\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -39538cf1e11c2cad3c6aa344722a4a7e25ba29b5198bb17a437b7d58f2704b4f +5400f97953ac153825a87fe481b158253f714f90958c07e0b43d19a3ae4c9e40
diff --git a/a/content_digest b/N2/content_digest index 13328c9..bbc09fa 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,7 +2,20 @@ "From\0Andrew Jones <ajones@ventanamicro.com>\0" "Subject\0[PATCH v5 1/8] RISC-V: alternatives: Support patching multiple insns in assembly\0" "Date\0Tue, 21 Feb 2023 20:09:09 +0100\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0linux-riscv@lists.infradead.org" + devicetree@vger.kernel.org + " kvm-riscv@lists.infradead.org\0" + "Cc\0'Rob Herring ' <robh@kernel.org>" + 'Jisheng Zhang ' <jszhang@kernel.org> + 'Anup Patel ' <apatel@ventanamicro.com> + 'Conor Dooley ' <conor.dooley@microchip.com> + 'Krzysztof Kozlowski ' <krzysztof.kozlowski+dt@linaro.org> + 'Heiko Stuebner ' <heiko@sntech.de> + 'Paul Walmsley ' <paul.walmsley@sifive.com> + 'Palmer Dabbelt ' <palmer@dabbelt.com> + 'Albert Ou ' <aou@eecs.berkeley.edu> + 'Ben Dooks ' <ben.dooks@codethink.co.uk> + " 'Atish Patra ' <atishp@rivosinc.com>\0" "\00:1\0" "b\0" "As pointed out in commit d374a16539b1 (\"RISC-V: fix compile error\n" @@ -51,4 +64,4 @@ "-- \n" 2.39.1 -39538cf1e11c2cad3c6aa344722a4a7e25ba29b5198bb17a437b7d58f2704b4f +090db3af0e0fb2a85079f54c275d178b9fea1b1f48e4c877d23eb4807e4df225
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