From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1207C61DA4 for ; Wed, 22 Feb 2023 03:32:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230356AbjBVDc2 (ORCPT ); Tue, 21 Feb 2023 22:32:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229561AbjBVDcS (ORCPT ); Tue, 21 Feb 2023 22:32:18 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1000434C2F; Tue, 21 Feb 2023 19:31:46 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 56CDACE1CE7; Wed, 22 Feb 2023 03:31:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1DAEEC433A1; Wed, 22 Feb 2023 03:31:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1677036695; bh=BCEF9tz3PqpoLVNs6mBcgcViy7YzFnU5Zx1xRtgtCrQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R1RpW8UtqtmM0PPoFbekx/WGniM1mqrmVKT6pQwhNBM/+wrXaF8TEO80rZvYIhh99 M9UWU9bnquG4jnW60wmVL87IFH4ZjOgilCHMwFpxm+k6XuYdt/TDY7DfMKwl2dBgmT QN5hwPLd+EyLlEkLM9jXEeNH+ixcUjHwqeOlFXUrOUzBVfFpEpYpjcQLVR2sU1w7Iz F+W1miBt+iwAu1KXzY0BnERMYnMGt2cQDVTgiSYG8Gp4e+rw5maWwH8g5OVmEy2Dld guJ1Fzr01mHt/KnaR3obPBKg8GVUMCBZxpzm11vt0xlUC3gZkjNyK3kjjNKX2fhLgt lYtdnhlgt7LYw== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, ben@decadent.org.uk, bjorn@kernel.org, palmer@dabbelt.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= Subject: [PATCH -next V17 7/7] riscv: entry: Consolidate general regs saving/restoring Date: Tue, 21 Feb 2023 22:30:21 -0500 Message-Id: <20230222033021.983168-8-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230222033021.983168-1-guoren@kernel.org> References: <20230222033021.983168-1-guoren@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org From: Jisheng Zhang Consolidate the saving/restoring GPs (except zero, ra, sp, gp, tp and t0) into save_from_x6_to_x31/restore_from_x6_to_x31 macros. No functional change intended. Signed-off-by: Jisheng Zhang Reviewed-by: Guo Ren Reviewed-by: Björn Töpel Tested-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/include/asm/asm.h | 61 +++++++++++++++++++++++++ arch/riscv/kernel/entry.S | 81 ++-------------------------------- arch/riscv/kernel/mcount-dyn.S | 57 ++---------------------- 3 files changed, 68 insertions(+), 131 deletions(-) diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h index 816e753de636..114bbadaef41 100644 --- a/arch/riscv/include/asm/asm.h +++ b/arch/riscv/include/asm/asm.h @@ -69,6 +69,7 @@ #endif #ifdef __ASSEMBLY__ +#include /* Common assembly source macros */ @@ -81,6 +82,66 @@ .endr .endm + /* save all GPs except x1 ~ x5 */ + .macro save_from_x6_to_x31 + REG_S x6, PT_T1(sp) + REG_S x7, PT_T2(sp) + REG_S x8, PT_S0(sp) + REG_S x9, PT_S1(sp) + REG_S x10, PT_A0(sp) + REG_S x11, PT_A1(sp) + REG_S x12, PT_A2(sp) + REG_S x13, PT_A3(sp) + REG_S x14, PT_A4(sp) + REG_S x15, PT_A5(sp) + REG_S x16, PT_A6(sp) + REG_S x17, PT_A7(sp) + REG_S x18, PT_S2(sp) + REG_S x19, PT_S3(sp) + REG_S x20, PT_S4(sp) + REG_S x21, PT_S5(sp) + REG_S x22, PT_S6(sp) + REG_S x23, PT_S7(sp) + REG_S x24, PT_S8(sp) + REG_S x25, PT_S9(sp) + REG_S x26, PT_S10(sp) + REG_S x27, PT_S11(sp) + REG_S x28, PT_T3(sp) + REG_S x29, PT_T4(sp) + REG_S x30, PT_T5(sp) + REG_S x31, PT_T6(sp) + .endm + + /* restore all GPs except x1 ~ x5 */ + .macro restore_from_x6_to_x31 + REG_L x6, PT_T1(sp) + REG_L x7, PT_T2(sp) + REG_L x8, PT_S0(sp) + REG_L x9, PT_S1(sp) + REG_L x10, PT_A0(sp) + REG_L x11, PT_A1(sp) + REG_L x12, PT_A2(sp) + REG_L x13, PT_A3(sp) + REG_L x14, PT_A4(sp) + REG_L x15, PT_A5(sp) + REG_L x16, PT_A6(sp) + REG_L x17, PT_A7(sp) + REG_L x18, PT_S2(sp) + REG_L x19, PT_S3(sp) + REG_L x20, PT_S4(sp) + REG_L x21, PT_S5(sp) + REG_L x22, PT_S6(sp) + REG_L x23, PT_S7(sp) + REG_L x24, PT_S8(sp) + REG_L x25, PT_S9(sp) + REG_L x26, PT_S10(sp) + REG_L x27, PT_S11(sp) + REG_L x28, PT_T3(sp) + REG_L x29, PT_T4(sp) + REG_L x30, PT_T5(sp) + REG_L x31, PT_T6(sp) + .endm + #endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_ASM_H */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 5ccef259498d..3fbb100bc9e4 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -42,32 +42,7 @@ _save_context: REG_S x1, PT_RA(sp) REG_S x3, PT_GP(sp) REG_S x5, PT_T0(sp) - REG_S x6, PT_T1(sp) - REG_S x7, PT_T2(sp) - REG_S x8, PT_S0(sp) - REG_S x9, PT_S1(sp) - REG_S x10, PT_A0(sp) - REG_S x11, PT_A1(sp) - REG_S x12, PT_A2(sp) - REG_S x13, PT_A3(sp) - REG_S x14, PT_A4(sp) - REG_S x15, PT_A5(sp) - REG_S x16, PT_A6(sp) - REG_S x17, PT_A7(sp) - REG_S x18, PT_S2(sp) - REG_S x19, PT_S3(sp) - REG_S x20, PT_S4(sp) - REG_S x21, PT_S5(sp) - REG_S x22, PT_S6(sp) - REG_S x23, PT_S7(sp) - REG_S x24, PT_S8(sp) - REG_S x25, PT_S9(sp) - REG_S x26, PT_S10(sp) - REG_S x27, PT_S11(sp) - REG_S x28, PT_T3(sp) - REG_S x29, PT_T4(sp) - REG_S x30, PT_T5(sp) - REG_S x31, PT_T6(sp) + save_from_x6_to_x31 /* * Disable user-mode memory access as it should only be set in the @@ -182,32 +157,7 @@ SYM_CODE_START_NOALIGN(ret_from_exception) REG_L x3, PT_GP(sp) REG_L x4, PT_TP(sp) REG_L x5, PT_T0(sp) - REG_L x6, PT_T1(sp) - REG_L x7, PT_T2(sp) - REG_L x8, PT_S0(sp) - REG_L x9, PT_S1(sp) - REG_L x10, PT_A0(sp) - REG_L x11, PT_A1(sp) - REG_L x12, PT_A2(sp) - REG_L x13, PT_A3(sp) - REG_L x14, PT_A4(sp) - REG_L x15, PT_A5(sp) - REG_L x16, PT_A6(sp) - REG_L x17, PT_A7(sp) - REG_L x18, PT_S2(sp) - REG_L x19, PT_S3(sp) - REG_L x20, PT_S4(sp) - REG_L x21, PT_S5(sp) - REG_L x22, PT_S6(sp) - REG_L x23, PT_S7(sp) - REG_L x24, PT_S8(sp) - REG_L x25, PT_S9(sp) - REG_L x26, PT_S10(sp) - REG_L x27, PT_S11(sp) - REG_L x28, PT_T3(sp) - REG_L x29, PT_T4(sp) - REG_L x30, PT_T5(sp) - REG_L x31, PT_T6(sp) + restore_from_x6_to_x31 REG_L x2, PT_SP(sp) @@ -287,32 +237,7 @@ restore_caller_reg: REG_S x1, PT_RA(sp) REG_S x3, PT_GP(sp) REG_S x5, PT_T0(sp) - REG_S x6, PT_T1(sp) - REG_S x7, PT_T2(sp) - REG_S x8, PT_S0(sp) - REG_S x9, PT_S1(sp) - REG_S x10, PT_A0(sp) - REG_S x11, PT_A1(sp) - REG_S x12, PT_A2(sp) - REG_S x13, PT_A3(sp) - REG_S x14, PT_A4(sp) - REG_S x15, PT_A5(sp) - REG_S x16, PT_A6(sp) - REG_S x17, PT_A7(sp) - REG_S x18, PT_S2(sp) - REG_S x19, PT_S3(sp) - REG_S x20, PT_S4(sp) - REG_S x21, PT_S5(sp) - REG_S x22, PT_S6(sp) - REG_S x23, PT_S7(sp) - REG_S x24, PT_S8(sp) - REG_S x25, PT_S9(sp) - REG_S x26, PT_S10(sp) - REG_S x27, PT_S11(sp) - REG_S x28, PT_T3(sp) - REG_S x29, PT_T4(sp) - REG_S x30, PT_T5(sp) - REG_S x31, PT_T6(sp) + save_from_x6_to_x31 REG_L s0, TASK_TI_KERNEL_SP(tp) csrr s1, CSR_STATUS diff --git a/arch/riscv/kernel/mcount-dyn.S b/arch/riscv/kernel/mcount-dyn.S index 125de818d1ba..669b8697aa38 100644 --- a/arch/riscv/kernel/mcount-dyn.S +++ b/arch/riscv/kernel/mcount-dyn.S @@ -66,66 +66,17 @@ REG_S x3, PT_GP(sp) REG_S x4, PT_TP(sp) REG_S x5, PT_T0(sp) - REG_S x6, PT_T1(sp) - REG_S x7, PT_T2(sp) - REG_S x8, PT_S0(sp) - REG_S x9, PT_S1(sp) - REG_S x10, PT_A0(sp) - REG_S x11, PT_A1(sp) - REG_S x12, PT_A2(sp) - REG_S x13, PT_A3(sp) - REG_S x14, PT_A4(sp) - REG_S x15, PT_A5(sp) - REG_S x16, PT_A6(sp) - REG_S x17, PT_A7(sp) - REG_S x18, PT_S2(sp) - REG_S x19, PT_S3(sp) - REG_S x20, PT_S4(sp) - REG_S x21, PT_S5(sp) - REG_S x22, PT_S6(sp) - REG_S x23, PT_S7(sp) - REG_S x24, PT_S8(sp) - REG_S x25, PT_S9(sp) - REG_S x26, PT_S10(sp) - REG_S x27, PT_S11(sp) - REG_S x28, PT_T3(sp) - REG_S x29, PT_T4(sp) - REG_S x30, PT_T5(sp) - REG_S x31, PT_T6(sp) + save_from_x6_to_x31 .endm .macro RESTORE_ALL - REG_L t0, PT_EPC(sp) REG_L x1, PT_RA(sp) REG_L x2, PT_SP(sp) REG_L x3, PT_GP(sp) REG_L x4, PT_TP(sp) - REG_L x6, PT_T1(sp) - REG_L x7, PT_T2(sp) - REG_L x8, PT_S0(sp) - REG_L x9, PT_S1(sp) - REG_L x10, PT_A0(sp) - REG_L x11, PT_A1(sp) - REG_L x12, PT_A2(sp) - REG_L x13, PT_A3(sp) - REG_L x14, PT_A4(sp) - REG_L x15, PT_A5(sp) - REG_L x16, PT_A6(sp) - REG_L x17, PT_A7(sp) - REG_L x18, PT_S2(sp) - REG_L x19, PT_S3(sp) - REG_L x20, PT_S4(sp) - REG_L x21, PT_S5(sp) - REG_L x22, PT_S6(sp) - REG_L x23, PT_S7(sp) - REG_L x24, PT_S8(sp) - REG_L x25, PT_S9(sp) - REG_L x26, PT_S10(sp) - REG_L x27, PT_S11(sp) - REG_L x28, PT_T3(sp) - REG_L x29, PT_T4(sp) - REG_L x30, PT_T5(sp) - REG_L x31, PT_T6(sp) + /* Restore t0 with PT_EPC */ + REG_L x5, PT_EPC(sp) + restore_from_x6_to_x31 addi sp, sp, PT_SIZE_ON_STACK .endm -- 2.36.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12C03C64EC7 for ; Wed, 22 Feb 2023 03:31:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=F31PJ/XG1IGZbIgnMAbSk2zoYhKnRWpHKQPvIT6wR1o=; b=KKJAQNtPTtzoH0 qE9W+Y2rMlT0M4/3IFyEuYIl6U3yNi2oCp+wr2094godb9JXHewm8cr0HR6ZH9nNwmzH2wvmnfRey Yy9cRg0E1APobGWquy6mUHN4Q6cJYdef3l4vEkI5z2RLhXjBVxEO9AdjNkoVeSq6bhNv/6P2VM3c8 xr5EVb//NzX3NyMusut/pgCBgJl1Ls819byndDlSkxEe1xZzo3gqMmKEHzFOeQprNikdJseie7JRG jdcgVnrAHanXWLKwwM2IU0rNLhBK0O8rcIFHq8vHCbVN0Mysmflss2Ra0ThoghT6TI8sKa9rywCIK 6ZyPXes1MaDyNQEgqkNw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pUfr3-00AbZp-ID; Wed, 22 Feb 2023 03:31:41 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pUfqz-00AbX6-TZ for linux-riscv@lists.infradead.org; Wed, 22 Feb 2023 03:31:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id F056CCE1CE5; Wed, 22 Feb 2023 03:31:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1DAEEC433A1; Wed, 22 Feb 2023 03:31:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1677036695; bh=BCEF9tz3PqpoLVNs6mBcgcViy7YzFnU5Zx1xRtgtCrQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R1RpW8UtqtmM0PPoFbekx/WGniM1mqrmVKT6pQwhNBM/+wrXaF8TEO80rZvYIhh99 M9UWU9bnquG4jnW60wmVL87IFH4ZjOgilCHMwFpxm+k6XuYdt/TDY7DfMKwl2dBgmT QN5hwPLd+EyLlEkLM9jXEeNH+ixcUjHwqeOlFXUrOUzBVfFpEpYpjcQLVR2sU1w7Iz F+W1miBt+iwAu1KXzY0BnERMYnMGt2cQDVTgiSYG8Gp4e+rw5maWwH8g5OVmEy2Dld guJ1Fzr01mHt/KnaR3obPBKg8GVUMCBZxpzm11vt0xlUC3gZkjNyK3kjjNKX2fhLgt lYtdnhlgt7LYw== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, ben@decadent.org.uk, bjorn@kernel.org, palmer@dabbelt.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= Subject: [PATCH -next V17 7/7] riscv: entry: Consolidate general regs saving/restoring Date: Tue, 21 Feb 2023 22:30:21 -0500 Message-Id: <20230222033021.983168-8-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230222033021.983168-1-guoren@kernel.org> References: <20230222033021.983168-1-guoren@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230221_193138_360679_631C7FDB X-CRM114-Status: UNSURE ( 9.41 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RnJvbTogSmlzaGVuZyBaaGFuZyA8anN6aGFuZ0BrZXJuZWwub3JnPgoKQ29uc29saWRhdGUgdGhl IHNhdmluZy9yZXN0b3JpbmcgR1BzIChleGNlcHQgemVybywgcmEsIHNwLCBncCwKdHAgYW5kIHQw KSBpbnRvIHNhdmVfZnJvbV94Nl90b194MzEvcmVzdG9yZV9mcm9tX3g2X3RvX3gzMSBtYWNyb3Mu CgpObyBmdW5jdGlvbmFsIGNoYW5nZSBpbnRlbmRlZC4KClNpZ25lZC1vZmYtYnk6IEppc2hlbmcg WmhhbmcgPGpzemhhbmdAa2VybmVsLm9yZz4KUmV2aWV3ZWQtYnk6IEd1byBSZW4gPGd1b3JlbkBr ZXJuZWwub3JnPgpSZXZpZXdlZC1ieTogQmrDtnJuIFTDtnBlbCA8Ympvcm5Acml2b3NpbmMuY29t PgpUZXN0ZWQtYnk6IEd1byBSZW4gPGd1b3JlbkBrZXJuZWwub3JnPgpTaWduZWQtb2ZmLWJ5OiBH dW8gUmVuIDxndW9yZW5Aa2VybmVsLm9yZz4KLS0tCiBhcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2Fz bS5oICAgfCA2MSArKysrKysrKysrKysrKysrKysrKysrKysrCiBhcmNoL3Jpc2N2L2tlcm5lbC9l bnRyeS5TICAgICAgfCA4MSArKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tCiBhcmNo L3Jpc2N2L2tlcm5lbC9tY291bnQtZHluLlMgfCA1NyArKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0K IDMgZmlsZXMgY2hhbmdlZCwgNjggaW5zZXJ0aW9ucygrKSwgMTMxIGRlbGV0aW9ucygtKQoKZGlm ZiAtLWdpdCBhL2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vYXNtLmggYi9hcmNoL3Jpc2N2L2luY2x1 ZGUvYXNtL2FzbS5oCmluZGV4IDgxNmU3NTNkZTYzNi4uMTE0YmJhZGFlZjQxIDEwMDY0NAotLS0g YS9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL2FzbS5oCisrKyBiL2FyY2gvcmlzY3YvaW5jbHVkZS9h c20vYXNtLmgKQEAgLTY5LDYgKzY5LDcgQEAKICNlbmRpZgogCiAjaWZkZWYgX19BU1NFTUJMWV9f CisjaW5jbHVkZSA8YXNtL2FzbS1vZmZzZXRzLmg+CiAKIC8qIENvbW1vbiBhc3NlbWJseSBzb3Vy Y2UgbWFjcm9zICovCiAKQEAgLTgxLDYgKzgyLDY2IEBACiAJLmVuZHIKIC5lbmRtCiAKKwkvKiBz YXZlIGFsbCBHUHMgZXhjZXB0IHgxIH4geDUgKi8KKwkubWFjcm8gc2F2ZV9mcm9tX3g2X3RvX3gz MQorCVJFR19TIHg2LCAgUFRfVDEoc3ApCisJUkVHX1MgeDcsICBQVF9UMihzcCkKKwlSRUdfUyB4 OCwgIFBUX1MwKHNwKQorCVJFR19TIHg5LCAgUFRfUzEoc3ApCisJUkVHX1MgeDEwLCBQVF9BMChz cCkKKwlSRUdfUyB4MTEsIFBUX0ExKHNwKQorCVJFR19TIHgxMiwgUFRfQTIoc3ApCisJUkVHX1Mg eDEzLCBQVF9BMyhzcCkKKwlSRUdfUyB4MTQsIFBUX0E0KHNwKQorCVJFR19TIHgxNSwgUFRfQTUo c3ApCisJUkVHX1MgeDE2LCBQVF9BNihzcCkKKwlSRUdfUyB4MTcsIFBUX0E3KHNwKQorCVJFR19T IHgxOCwgUFRfUzIoc3ApCisJUkVHX1MgeDE5LCBQVF9TMyhzcCkKKwlSRUdfUyB4MjAsIFBUX1M0 KHNwKQorCVJFR19TIHgyMSwgUFRfUzUoc3ApCisJUkVHX1MgeDIyLCBQVF9TNihzcCkKKwlSRUdf UyB4MjMsIFBUX1M3KHNwKQorCVJFR19TIHgyNCwgUFRfUzgoc3ApCisJUkVHX1MgeDI1LCBQVF9T OShzcCkKKwlSRUdfUyB4MjYsIFBUX1MxMChzcCkKKwlSRUdfUyB4MjcsIFBUX1MxMShzcCkKKwlS RUdfUyB4MjgsIFBUX1QzKHNwKQorCVJFR19TIHgyOSwgUFRfVDQoc3ApCisJUkVHX1MgeDMwLCBQ VF9UNShzcCkKKwlSRUdfUyB4MzEsIFBUX1Q2KHNwKQorCS5lbmRtCisKKwkvKiByZXN0b3JlIGFs bCBHUHMgZXhjZXB0IHgxIH4geDUgKi8KKwkubWFjcm8gcmVzdG9yZV9mcm9tX3g2X3RvX3gzMQor CVJFR19MIHg2LCAgUFRfVDEoc3ApCisJUkVHX0wgeDcsICBQVF9UMihzcCkKKwlSRUdfTCB4OCwg IFBUX1MwKHNwKQorCVJFR19MIHg5LCAgUFRfUzEoc3ApCisJUkVHX0wgeDEwLCBQVF9BMChzcCkK KwlSRUdfTCB4MTEsIFBUX0ExKHNwKQorCVJFR19MIHgxMiwgUFRfQTIoc3ApCisJUkVHX0wgeDEz LCBQVF9BMyhzcCkKKwlSRUdfTCB4MTQsIFBUX0E0KHNwKQorCVJFR19MIHgxNSwgUFRfQTUoc3Ap CisJUkVHX0wgeDE2LCBQVF9BNihzcCkKKwlSRUdfTCB4MTcsIFBUX0E3KHNwKQorCVJFR19MIHgx OCwgUFRfUzIoc3ApCisJUkVHX0wgeDE5LCBQVF9TMyhzcCkKKwlSRUdfTCB4MjAsIFBUX1M0KHNw KQorCVJFR19MIHgyMSwgUFRfUzUoc3ApCisJUkVHX0wgeDIyLCBQVF9TNihzcCkKKwlSRUdfTCB4 MjMsIFBUX1M3KHNwKQorCVJFR19MIHgyNCwgUFRfUzgoc3ApCisJUkVHX0wgeDI1LCBQVF9TOShz cCkKKwlSRUdfTCB4MjYsIFBUX1MxMChzcCkKKwlSRUdfTCB4MjcsIFBUX1MxMShzcCkKKwlSRUdf TCB4MjgsIFBUX1QzKHNwKQorCVJFR19MIHgyOSwgUFRfVDQoc3ApCisJUkVHX0wgeDMwLCBQVF9U NShzcCkKKwlSRUdfTCB4MzEsIFBUX1Q2KHNwKQorCS5lbmRtCisKICNlbmRpZiAvKiBfX0FTU0VN QkxZX18gKi8KIAogI2VuZGlmIC8qIF9BU01fUklTQ1ZfQVNNX0ggKi8KZGlmZiAtLWdpdCBhL2Fy Y2gvcmlzY3Yva2VybmVsL2VudHJ5LlMgYi9hcmNoL3Jpc2N2L2tlcm5lbC9lbnRyeS5TCmluZGV4 IDVjY2VmMjU5NDk4ZC4uM2ZiYjEwMGJjOWU0IDEwMDY0NAotLS0gYS9hcmNoL3Jpc2N2L2tlcm5l bC9lbnRyeS5TCisrKyBiL2FyY2gvcmlzY3Yva2VybmVsL2VudHJ5LlMKQEAgLTQyLDMyICs0Miw3 IEBAIF9zYXZlX2NvbnRleHQ6CiAJUkVHX1MgeDEsICBQVF9SQShzcCkKIAlSRUdfUyB4MywgIFBU X0dQKHNwKQogCVJFR19TIHg1LCAgUFRfVDAoc3ApCi0JUkVHX1MgeDYsICBQVF9UMShzcCkKLQlS RUdfUyB4NywgIFBUX1QyKHNwKQotCVJFR19TIHg4LCAgUFRfUzAoc3ApCi0JUkVHX1MgeDksICBQ VF9TMShzcCkKLQlSRUdfUyB4MTAsIFBUX0EwKHNwKQotCVJFR19TIHgxMSwgUFRfQTEoc3ApCi0J UkVHX1MgeDEyLCBQVF9BMihzcCkKLQlSRUdfUyB4MTMsIFBUX0EzKHNwKQotCVJFR19TIHgxNCwg UFRfQTQoc3ApCi0JUkVHX1MgeDE1LCBQVF9BNShzcCkKLQlSRUdfUyB4MTYsIFBUX0E2KHNwKQot CVJFR19TIHgxNywgUFRfQTcoc3ApCi0JUkVHX1MgeDE4LCBQVF9TMihzcCkKLQlSRUdfUyB4MTks IFBUX1MzKHNwKQotCVJFR19TIHgyMCwgUFRfUzQoc3ApCi0JUkVHX1MgeDIxLCBQVF9TNShzcCkK LQlSRUdfUyB4MjIsIFBUX1M2KHNwKQotCVJFR19TIHgyMywgUFRfUzcoc3ApCi0JUkVHX1MgeDI0 LCBQVF9TOChzcCkKLQlSRUdfUyB4MjUsIFBUX1M5KHNwKQotCVJFR19TIHgyNiwgUFRfUzEwKHNw KQotCVJFR19TIHgyNywgUFRfUzExKHNwKQotCVJFR19TIHgyOCwgUFRfVDMoc3ApCi0JUkVHX1Mg eDI5LCBQVF9UNChzcCkKLQlSRUdfUyB4MzAsIFBUX1Q1KHNwKQotCVJFR19TIHgzMSwgUFRfVDYo c3ApCisJc2F2ZV9mcm9tX3g2X3RvX3gzMQogCiAJLyoKIAkgKiBEaXNhYmxlIHVzZXItbW9kZSBt ZW1vcnkgYWNjZXNzIGFzIGl0IHNob3VsZCBvbmx5IGJlIHNldCBpbiB0aGUKQEAgLTE4MiwzMiAr MTU3LDcgQEAgU1lNX0NPREVfU1RBUlRfTk9BTElHTihyZXRfZnJvbV9leGNlcHRpb24pCiAJUkVH X0wgeDMsICBQVF9HUChzcCkKIAlSRUdfTCB4NCwgIFBUX1RQKHNwKQogCVJFR19MIHg1LCAgUFRf VDAoc3ApCi0JUkVHX0wgeDYsICBQVF9UMShzcCkKLQlSRUdfTCB4NywgIFBUX1QyKHNwKQotCVJF R19MIHg4LCAgUFRfUzAoc3ApCi0JUkVHX0wgeDksICBQVF9TMShzcCkKLQlSRUdfTCB4MTAsIFBU X0EwKHNwKQotCVJFR19MIHgxMSwgUFRfQTEoc3ApCi0JUkVHX0wgeDEyLCBQVF9BMihzcCkKLQlS RUdfTCB4MTMsIFBUX0EzKHNwKQotCVJFR19MIHgxNCwgUFRfQTQoc3ApCi0JUkVHX0wgeDE1LCBQ VF9BNShzcCkKLQlSRUdfTCB4MTYsIFBUX0E2KHNwKQotCVJFR19MIHgxNywgUFRfQTcoc3ApCi0J UkVHX0wgeDE4LCBQVF9TMihzcCkKLQlSRUdfTCB4MTksIFBUX1MzKHNwKQotCVJFR19MIHgyMCwg UFRfUzQoc3ApCi0JUkVHX0wgeDIxLCBQVF9TNShzcCkKLQlSRUdfTCB4MjIsIFBUX1M2KHNwKQot CVJFR19MIHgyMywgUFRfUzcoc3ApCi0JUkVHX0wgeDI0LCBQVF9TOChzcCkKLQlSRUdfTCB4MjUs IFBUX1M5KHNwKQotCVJFR19MIHgyNiwgUFRfUzEwKHNwKQotCVJFR19MIHgyNywgUFRfUzExKHNw KQotCVJFR19MIHgyOCwgUFRfVDMoc3ApCi0JUkVHX0wgeDI5LCBQVF9UNChzcCkKLQlSRUdfTCB4 MzAsIFBUX1Q1KHNwKQotCVJFR19MIHgzMSwgUFRfVDYoc3ApCisJcmVzdG9yZV9mcm9tX3g2X3Rv X3gzMQogCiAJUkVHX0wgeDIsICBQVF9TUChzcCkKIApAQCAtMjg3LDMyICsyMzcsNyBAQCByZXN0 b3JlX2NhbGxlcl9yZWc6CiAJUkVHX1MgeDEsICBQVF9SQShzcCkKIAlSRUdfUyB4MywgIFBUX0dQ KHNwKQogCVJFR19TIHg1LCAgUFRfVDAoc3ApCi0JUkVHX1MgeDYsICBQVF9UMShzcCkKLQlSRUdf UyB4NywgIFBUX1QyKHNwKQotCVJFR19TIHg4LCAgUFRfUzAoc3ApCi0JUkVHX1MgeDksICBQVF9T MShzcCkKLQlSRUdfUyB4MTAsIFBUX0EwKHNwKQotCVJFR19TIHgxMSwgUFRfQTEoc3ApCi0JUkVH X1MgeDEyLCBQVF9BMihzcCkKLQlSRUdfUyB4MTMsIFBUX0EzKHNwKQotCVJFR19TIHgxNCwgUFRf QTQoc3ApCi0JUkVHX1MgeDE1LCBQVF9BNShzcCkKLQlSRUdfUyB4MTYsIFBUX0E2KHNwKQotCVJF R19TIHgxNywgUFRfQTcoc3ApCi0JUkVHX1MgeDE4LCBQVF9TMihzcCkKLQlSRUdfUyB4MTksIFBU X1MzKHNwKQotCVJFR19TIHgyMCwgUFRfUzQoc3ApCi0JUkVHX1MgeDIxLCBQVF9TNShzcCkKLQlS RUdfUyB4MjIsIFBUX1M2KHNwKQotCVJFR19TIHgyMywgUFRfUzcoc3ApCi0JUkVHX1MgeDI0LCBQ VF9TOChzcCkKLQlSRUdfUyB4MjUsIFBUX1M5KHNwKQotCVJFR19TIHgyNiwgUFRfUzEwKHNwKQot CVJFR19TIHgyNywgUFRfUzExKHNwKQotCVJFR19TIHgyOCwgUFRfVDMoc3ApCi0JUkVHX1MgeDI5 LCBQVF9UNChzcCkKLQlSRUdfUyB4MzAsIFBUX1Q1KHNwKQotCVJFR19TIHgzMSwgUFRfVDYoc3Ap CisJc2F2ZV9mcm9tX3g2X3RvX3gzMQogCiAJUkVHX0wgczAsIFRBU0tfVElfS0VSTkVMX1NQKHRw KQogCWNzcnIgczEsIENTUl9TVEFUVVMKZGlmZiAtLWdpdCBhL2FyY2gvcmlzY3Yva2VybmVsL21j b3VudC1keW4uUyBiL2FyY2gvcmlzY3Yva2VybmVsL21jb3VudC1keW4uUwppbmRleCAxMjVkZTgx OGQxYmEuLjY2OWI4Njk3YWEzOCAxMDA2NDQKLS0tIGEvYXJjaC9yaXNjdi9rZXJuZWwvbWNvdW50 LWR5bi5TCisrKyBiL2FyY2gvcmlzY3Yva2VybmVsL21jb3VudC1keW4uUwpAQCAtNjYsNjYgKzY2 LDE3IEBACiAJUkVHX1MgeDMsICBQVF9HUChzcCkKIAlSRUdfUyB4NCwgIFBUX1RQKHNwKQogCVJF R19TIHg1LCAgUFRfVDAoc3ApCi0JUkVHX1MgeDYsICBQVF9UMShzcCkKLQlSRUdfUyB4NywgIFBU X1QyKHNwKQotCVJFR19TIHg4LCAgUFRfUzAoc3ApCi0JUkVHX1MgeDksICBQVF9TMShzcCkKLQlS RUdfUyB4MTAsIFBUX0EwKHNwKQotCVJFR19TIHgxMSwgUFRfQTEoc3ApCi0JUkVHX1MgeDEyLCBQ VF9BMihzcCkKLQlSRUdfUyB4MTMsIFBUX0EzKHNwKQotCVJFR19TIHgxNCwgUFRfQTQoc3ApCi0J UkVHX1MgeDE1LCBQVF9BNShzcCkKLQlSRUdfUyB4MTYsIFBUX0E2KHNwKQotCVJFR19TIHgxNywg UFRfQTcoc3ApCi0JUkVHX1MgeDE4LCBQVF9TMihzcCkKLQlSRUdfUyB4MTksIFBUX1MzKHNwKQot CVJFR19TIHgyMCwgUFRfUzQoc3ApCi0JUkVHX1MgeDIxLCBQVF9TNShzcCkKLQlSRUdfUyB4MjIs IFBUX1M2KHNwKQotCVJFR19TIHgyMywgUFRfUzcoc3ApCi0JUkVHX1MgeDI0LCBQVF9TOChzcCkK LQlSRUdfUyB4MjUsIFBUX1M5KHNwKQotCVJFR19TIHgyNiwgUFRfUzEwKHNwKQotCVJFR19TIHgy NywgUFRfUzExKHNwKQotCVJFR19TIHgyOCwgUFRfVDMoc3ApCi0JUkVHX1MgeDI5LCBQVF9UNChz cCkKLQlSRUdfUyB4MzAsIFBUX1Q1KHNwKQotCVJFR19TIHgzMSwgUFRfVDYoc3ApCisJc2F2ZV9m cm9tX3g2X3RvX3gzMQogCS5lbmRtCiAKIAkubWFjcm8gUkVTVE9SRV9BTEwKLQlSRUdfTCB0MCwg IFBUX0VQQyhzcCkKIAlSRUdfTCB4MSwgIFBUX1JBKHNwKQogCVJFR19MIHgyLCAgUFRfU1Aoc3Ap CiAJUkVHX0wgeDMsICBQVF9HUChzcCkKIAlSRUdfTCB4NCwgIFBUX1RQKHNwKQotCVJFR19MIHg2 LCAgUFRfVDEoc3ApCi0JUkVHX0wgeDcsICBQVF9UMihzcCkKLQlSRUdfTCB4OCwgIFBUX1MwKHNw KQotCVJFR19MIHg5LCAgUFRfUzEoc3ApCi0JUkVHX0wgeDEwLCBQVF9BMChzcCkKLQlSRUdfTCB4 MTEsIFBUX0ExKHNwKQotCVJFR19MIHgxMiwgUFRfQTIoc3ApCi0JUkVHX0wgeDEzLCBQVF9BMyhz cCkKLQlSRUdfTCB4MTQsIFBUX0E0KHNwKQotCVJFR19MIHgxNSwgUFRfQTUoc3ApCi0JUkVHX0wg eDE2LCBQVF9BNihzcCkKLQlSRUdfTCB4MTcsIFBUX0E3KHNwKQotCVJFR19MIHgxOCwgUFRfUzIo c3ApCi0JUkVHX0wgeDE5LCBQVF9TMyhzcCkKLQlSRUdfTCB4MjAsIFBUX1M0KHNwKQotCVJFR19M IHgyMSwgUFRfUzUoc3ApCi0JUkVHX0wgeDIyLCBQVF9TNihzcCkKLQlSRUdfTCB4MjMsIFBUX1M3 KHNwKQotCVJFR19MIHgyNCwgUFRfUzgoc3ApCi0JUkVHX0wgeDI1LCBQVF9TOShzcCkKLQlSRUdf TCB4MjYsIFBUX1MxMChzcCkKLQlSRUdfTCB4MjcsIFBUX1MxMShzcCkKLQlSRUdfTCB4MjgsIFBU X1QzKHNwKQotCVJFR19MIHgyOSwgUFRfVDQoc3ApCi0JUkVHX0wgeDMwLCBQVF9UNShzcCkKLQlS RUdfTCB4MzEsIFBUX1Q2KHNwKQorCS8qIFJlc3RvcmUgdDAgd2l0aCBQVF9FUEMgKi8KKwlSRUdf TCB4NSwgIFBUX0VQQyhzcCkKKwlyZXN0b3JlX2Zyb21feDZfdG9feDMxCiAKIAlhZGRpCXNwLCBz cCwgUFRfU0laRV9PTl9TVEFDSwogCS5lbmRtCi0tIAoyLjM2LjEKCgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1yaXNjdiBtYWlsaW5nIGxpc3QK bGludXgtcmlzY3ZAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9y Zy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LXJpc2N2Cg==