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From: Sunil V L <sunilvl@ventanamicro.com>
To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bin.meng@windriver.com>,
	Weiwei Li <liweiwei@iscas.ac.cn>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <apatel@ventanamicro.com>,
	Atish Kumar Patra <atishp@rivosinc.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Sunil V L <sunilvl@ventanamicro.com>
Subject: [PATCH V5 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
Date: Thu,  2 Mar 2023 14:42:09 +0530	[thread overview]
Message-ID: <20230302091212.999767-6-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20230302091212.999767-1-sunilvl@ventanamicro.com>

Add Multiple APIC Description Table (MADT) with the
RINTC structure for each cpu.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 hw/riscv/virt-acpi-build.c | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index d6947fdc74..026d1eaf88 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -32,6 +32,7 @@
 #include "sysemu/reset.h"
 #include "migration/vmstate.h"
 #include "hw/riscv/virt.h"
+#include "hw/riscv/numa.h"
 
 #define ACPI_BUILD_TABLE_SIZE             0x20000
 
@@ -160,6 +161,36 @@ static void build_dsdt(GArray *table_data,
     free_aml_allocator();
 }
 
+/*
+ * ACPI spec, Revision 6.5+
+ * 5.2.12 Multiple APIC Description Table (MADT)
+ * REF: https://github.com/riscv-non-isa/riscv-acpi/issues/15
+ *      https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
+ */
+static void build_madt(GArray *table_data,
+                       BIOSLinker *linker,
+                       RISCVVirtState *s)
+{
+    MachineClass *mc = MACHINE_GET_CLASS(s);
+    MachineState *ms = MACHINE(s);
+    const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
+
+    AcpiTable table = { .sig = "APIC", .rev = 6, .oem_id = s->oem_id,
+                        .oem_table_id = s->oem_table_id };
+
+    acpi_table_begin(&table, table_data);
+    /* Local Interrupt Controller Address */
+    build_append_int_noprefix(table_data, 0, 4);
+    build_append_int_noprefix(table_data, 0, 4);   /* MADT Flags */
+
+    /* RISC-V Local INTC structures per HART */
+    for (int i = 0; i < arch_ids->len; i++) {
+        riscv_acpi_madt_add_rintc(i, arch_ids, table_data);
+    }
+
+    acpi_table_end(linker, &table);
+}
+
 static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables)
 {
     GArray *table_offsets;
@@ -181,6 +212,9 @@ static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables)
     acpi_add_table(table_offsets, tables_blob);
     build_fadt_rev6(tables_blob, tables->linker, s, dsdt);
 
+    acpi_add_table(table_offsets, tables_blob);
+    build_madt(tables_blob, tables->linker, s);
+
     /* XSDT is pointed to by RSDP */
     xsdt = tables_blob->len;
     build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id,
-- 
2.34.1



  parent reply	other threads:[~2023-03-02  9:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-02  9:12 [PATCH V5 0/8] Add basic ACPI support for risc-v virt Sunil V L
2023-03-02  9:12 ` [PATCH V5 1/8] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields Sunil V L
2023-03-02  9:12 ` [PATCH V5 2/8] hw/riscv/virt: Add a switch to disable ACPI Sunil V L
2023-03-02  9:12 ` [PATCH V5 3/8] hw/riscv/virt: Add memmap pointer to RiscVVirtState Sunil V L
2023-03-02  9:12 ` [PATCH V5 4/8] hw/riscv/virt: Enable basic ACPI infrastructure Sunil V L
2023-03-02  9:12 ` Sunil V L [this message]
2023-03-02  9:12 ` [PATCH V5 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table Sunil V L
2023-03-02  9:12 ` [PATCH V5 7/8] hw/riscv/virt.c: Initialize the ACPI tables Sunil V L
2023-03-02  9:12 ` [PATCH V5 8/8] MAINTAINERS: Add entry for RISC-V ACPI Sunil V L
2023-03-05 23:45 ` [PATCH V5 0/8] Add basic ACPI support for risc-v virt Palmer Dabbelt
2023-03-06 19:50   ` Palmer Dabbelt

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