From: Saeed Mahameed <saeed@kernel.org>
To: "David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Eric Dumazet <edumazet@google.com>
Cc: Saeed Mahameed <saeedm@nvidia.com>,
netdev@vger.kernel.org, Tariq Toukan <tariqt@nvidia.com>,
Adham Faris <afaris@nvidia.com>
Subject: [net-next 06/15] net/mlx5e: Rename RQ/SQ adaptive moderation state flag
Date: Mon, 13 Mar 2023 22:42:25 -0700 [thread overview]
Message-ID: <20230314054234.267365-7-saeed@kernel.org> (raw)
In-Reply-To: <20230314054234.267365-1-saeed@kernel.org>
From: Adham Faris <afaris@nvidia.com>
Dynamic interrupt moderation RQ and SQ feature represented by
MLX5E_RQ_STATE_AM and MLX5E_SQ_STATE_AM enums respectively, is not
consistent with the feature naming in the driver, and with the formal
feature and library names.
Hence, change MLX5E_RQ_STATE_AM and MLX5E_SQ_STATE_AM enum type names in
core/en.h to MLX5E_RQ_STATE_DIM and MLX5E_SQ_STATE_DIM respectively.
Signed-off-by: Adham Faris <afaris@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en.h | 4 ++--
drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 4 ++--
drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
index 88460b7796e5..66bca3a6a057 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
@@ -339,7 +339,7 @@ static inline u8 mlx5e_get_dcb_num_tc(struct mlx5e_params *params)
enum {
MLX5E_RQ_STATE_ENABLED,
MLX5E_RQ_STATE_RECOVERING,
- MLX5E_RQ_STATE_AM,
+ MLX5E_RQ_STATE_DIM,
MLX5E_RQ_STATE_NO_CSUM_COMPLETE,
MLX5E_RQ_STATE_CSUM_FULL, /* cqe_csum_full hw bit is set */
MLX5E_RQ_STATE_MINI_CQE_HW_STRIDX, /* set when mini_cqe_resp_stride_index cap is used */
@@ -390,7 +390,7 @@ enum {
MLX5E_SQ_STATE_MPWQE,
MLX5E_SQ_STATE_RECOVERING,
MLX5E_SQ_STATE_IPSEC,
- MLX5E_SQ_STATE_AM,
+ MLX5E_SQ_STATE_DIM,
MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE,
MLX5E_SQ_STATE_PENDING_XSK_TX,
MLX5E_SQ_STATE_PENDING_TLS_RX_RESYNC,
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
index 76a9c5194a70..5ca9fcf84586 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -1188,7 +1188,7 @@ int mlx5e_open_rq(struct mlx5e_params *params, struct mlx5e_rq_param *param,
__set_bit(MLX5E_RQ_STATE_CSUM_FULL, &rq->state);
if (params->rx_dim_enabled)
- __set_bit(MLX5E_RQ_STATE_AM, &rq->state);
+ __set_bit(MLX5E_RQ_STATE_DIM, &rq->state);
/* We disable csum_complete when XDP is enabled since
* XDP programs might manipulate packets which will render
@@ -1664,7 +1664,7 @@ int mlx5e_open_txqsq(struct mlx5e_channel *c, u32 tisn, int txq_ix,
mlx5e_set_sq_maxrate(c->netdev, sq, tx_rate);
if (params->tx_dim_enabled)
- sq->state |= BIT(MLX5E_SQ_STATE_AM);
+ sq->state |= BIT(MLX5E_SQ_STATE_DIM);
return 0;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
index 9a458a5d9853..a50bfda18e96 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
@@ -51,7 +51,7 @@ static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq)
struct mlx5e_sq_stats *stats = sq->stats;
struct dim_sample dim_sample = {};
- if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state)))
+ if (unlikely(!test_bit(MLX5E_SQ_STATE_DIM, &sq->state)))
return;
dim_update_sample(sq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
@@ -63,7 +63,7 @@ static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)
struct mlx5e_rq_stats *stats = rq->stats;
struct dim_sample dim_sample = {};
- if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state)))
+ if (unlikely(!test_bit(MLX5E_RQ_STATE_DIM, &rq->state)))
return;
dim_update_sample(rq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
--
2.39.2
next prev parent reply other threads:[~2023-03-14 5:43 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-14 5:42 [pull request][net-next 00/15] mlx5 updates 2023-03-13 Saeed Mahameed
2023-03-14 5:42 ` [net-next 01/15] net/mlx5: remove redundant clear_bit Saeed Mahameed
2023-03-16 5:20 ` patchwork-bot+netdevbpf
2023-03-14 5:42 ` [net-next 02/15] net/mlx5: Stop waiting for PCI up if teardown was triggered Saeed Mahameed
2023-03-14 5:42 ` [net-next 03/15] net/mlx5: Add comment to mlx5_devlink_params_register() Saeed Mahameed
2023-03-14 5:42 ` [net-next 04/15] net/mlx5: Implement thermal zone Saeed Mahameed
2023-03-14 5:42 ` [net-next 05/15] net/mlx5e: Correct SKB room check to use all room in the fifo Saeed Mahameed
2023-03-16 4:56 ` Jakub Kicinski
2023-03-16 4:59 ` Jakub Kicinski
2023-03-16 5:05 ` Saeed Mahameed
2023-03-16 5:13 ` Jakub Kicinski
2023-03-14 5:42 ` Saeed Mahameed [this message]
2023-03-14 5:42 ` [net-next 07/15] net/mlx5e: Stringify RQ SW state in RQ devlink health diagnostics Saeed Mahameed
2023-03-14 5:42 ` [net-next 08/15] net/mlx5e: Expose SQ SW state as part of SQ " Saeed Mahameed
2023-03-14 5:42 ` [net-next 09/15] net/mlx5e: Add XSK RQ state flag for RQ devlink " Saeed Mahameed
2023-03-14 5:42 ` [net-next 10/15] net/mlx5: Move needed PTYS functions to core layer Saeed Mahameed
2023-03-14 5:42 ` [net-next 11/15] net/mlx5e: Add devlink hairpin queues parameters Saeed Mahameed
2023-03-14 5:42 ` [net-next 12/15] net/mlx5e: Add more information to hairpin table dump Saeed Mahameed
2023-03-14 5:42 ` [net-next 13/15] net/mlx5e: TC, Extract indr setup block checks to function Saeed Mahameed
2023-03-14 5:42 ` [net-next 14/15] net/mlx5e: Enable TC offload for ingress MACVLAN over bond Saeed Mahameed
2023-03-14 5:42 ` [net-next 15/15] net/mlx5e: Enable TC offload for egress " Saeed Mahameed
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