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[75.72.166.104]) by smtp.gmail.com with ESMTPSA id a23-20020a027357000000b00406227162fesm2363460jae.32.2023.03.19.06.21.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Mar 2023 06:21:34 -0700 (PDT) From: Adam Ford To: linux-clk@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Abel Vesa , Peng Fan , Michael Turquette , Stephen Boyd , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate Date: Sun, 19 Mar 2023 08:21:19 -0500 Message-Id: <20230319132120.6347-3-aford173@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230319132120.6347-1-aford173@gmail.com> References: <20230319132120.6347-1-aford173@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org By default the display pixel clock needs to be evenly divide down from 594MHz which rules out a significant number of resolution and refresh rates. The current clock tree looks something like: video_pll1 594000000 video_pll1_bypass 594000000 video_pll1_out 594000000 lcdif_pixel 148500000 Now that composite-8m supports determine_rate, we can allow lcdif_pixel to set the parent rate which then switches every clock in the chain to a new frequency when lcdif_pixel cannot evenly divide from video_pll1_out. Signed-off-by: Adam Ford diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index b618892170f2..075f643e3f35 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -468,7 +468,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev) hws[IMX8MM_CLK_PCIE1_PHY] = imx8m_clk_hw_composite("pcie1_phy", imx8mm_pcie1_phy_sels, base + 0xa380); hws[IMX8MM_CLK_PCIE1_AUX] = imx8m_clk_hw_composite("pcie1_aux", imx8mm_pcie1_aux_sels, base + 0xa400); hws[IMX8MM_CLK_DC_PIXEL] = imx8m_clk_hw_composite("dc_pixel", imx8mm_dc_pixel_sels, base + 0xa480); - hws[IMX8MM_CLK_LCDIF_PIXEL] = imx8m_clk_hw_composite("lcdif_pixel", imx8mm_lcdif_pixel_sels, base + 0xa500); + hws[IMX8MM_CLK_LCDIF_PIXEL] = imx8m_clk_hw_composite_flags("lcdif_pixel", imx8mm_lcdif_pixel_sels, base + 0xa500, CLK_SET_RATE_PARENT); hws[IMX8MM_CLK_SAI1] = imx8m_clk_hw_composite("sai1", imx8mm_sai1_sels, base + 0xa580); hws[IMX8MM_CLK_SAI2] = imx8m_clk_hw_composite("sai2", imx8mm_sai2_sels, base + 0xa600); hws[IMX8MM_CLK_SAI3] = imx8m_clk_hw_composite("sai3", imx8mm_sai3_sels, base + 0xa680); -- 2.34.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4DE81C6FD1F for ; Sun, 19 Mar 2023 13:22:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=B0fekmvFUE/ZigTkBXGA/A/dtJzxEnBwa8KJ2PEvIZs=; b=4mLqje8oGx7Yn2 aMLot/6UZTrC1BH/qCLap+u3kUaciasd4KmqGJd2JwFLB7PL7aD88GxCBpaZt9J6jdbBDtuACzm7Z /Z/O4qAjHrWw6ZbAVWpz4P0Ue3tAZIBAjN9fgxJaksd3iO/LIvquadafYXY6OAflvgN9Qx6qUQcC5 ZOtO/17snx9lh6jAPWXGS1v7X/bfZVTKp24yfSnJm9A8eaiJnNgWAicMjl9qfVrS4p0msFqzSXqQQ QabOGzx4xiPBu76TQnnsM/zBOSwoqCrkwaQpdarpMrsCDiCMEYXsH50aN1NOJGlCG0cK0Ad2WMm4N nQtdFOH96an5LAIVYqGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pdsym-006nMQ-05; Sun, 19 Mar 2023 13:21:44 +0000 Received: from mail-io1-xd31.google.com ([2607:f8b0:4864:20::d31]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pdsyf-006nKc-0u for linux-arm-kernel@lists.infradead.org; Sun, 19 Mar 2023 13:21:38 +0000 Received: by mail-io1-xd31.google.com with SMTP id bf15so4342797iob.7 for ; Sun, 19 Mar 2023 06:21:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679232095; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ICE/28jdiWQEExDCz4xlI7/MltQ5deN6UZpAbZEvh1g=; b=dwsNCcZCAaA8Y95qfxLCA6gLC/K5wYt/9k7ZquFa43Fw5t8CDxySvGP93vagrin9h+ 9Ruyraig8kgFcB0eLmEIqwN+zpo7ETEMJirizprUeyBchxaZuPMKtZyaTxLisJ3bguUB QGxU1SvqDYURdkUbw0Rz6XckvfoHZLXHET+/XgqvDof5lfZPQSLcrUy/0Ks6U5PCV4m+ vXGBp88/pm8M3QZJHiTjOncseRwaPYIXMdvk2mG7chqijMJ93WZzDSC4DQrr+hjWrvnr gl7/TZkD2DoHfrXGtL3WWdygPKaXpO0A+CmbmVAytN8uHj9Z+ykVkKl0pysyIlWSZL5r kkmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679232095; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ICE/28jdiWQEExDCz4xlI7/MltQ5deN6UZpAbZEvh1g=; b=FYJ0G6UnjH9ByNa5OYQ6jJJJxk58gYD9NpP2Hb67uNnE8Ge+basih4iI3sX7m9crIr PErNSmzfQRPK6lIM6d0GNqB2I49QsNgaKvYMuPeXJ4lqGme1i5m/5Nqudu0f0MQY9ocn yRK1PQlcfsUGPqPlNIDJvQfShn0/DoJOdl2Lp/xnhDyO9bNZ7OfuX6ALew5dAOSJkAOH 4JZPRcKuvQ+c4jwdD+Onw02WC0765lX8+wBId2nsN/w0ggAEypGgZY9YwBi0yen943JQ 2RAg83TBNhkcHBJEU4VkjAjlGyiCmQICnG7MedYLFtGoaaBRaPa0bYynUFpb7P3Nz6Jd qqvQ== X-Gm-Message-State: AO0yUKULL7WKcVxT1FB+cuqqLD+CR6/FRxl/gfLF8C1D/9dYV//MZv/+ aB1QXkyx2GCrgvdYwik6W2ztrYiqJ6U= X-Google-Smtp-Source: AK7set9jE3Qxtj29KL2vNJruxgw0I0I8Rgfvxf+OhLddCuPylzgqtHa2ahdOmGXz8gVXWjtyP7qaMw== X-Received: by 2002:a5d:8254:0:b0:750:6c44:3454 with SMTP id n20-20020a5d8254000000b007506c443454mr3247920ioo.12.1679232095050; Sun, 19 Mar 2023 06:21:35 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan (c-75-72-166-104.hsd1.mn.comcast.net. [75.72.166.104]) by smtp.gmail.com with ESMTPSA id a23-20020a027357000000b00406227162fesm2363460jae.32.2023.03.19.06.21.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Mar 2023 06:21:34 -0700 (PDT) From: Adam Ford To: linux-clk@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Abel Vesa , Peng Fan , Michael Turquette , Stephen Boyd , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate Date: Sun, 19 Mar 2023 08:21:19 -0500 Message-Id: <20230319132120.6347-3-aford173@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230319132120.6347-1-aford173@gmail.com> References: <20230319132120.6347-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230319_062137_335641_B0ACD7CE X-CRM114-Status: UNSURE ( 9.50 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org By default the display pixel clock needs to be evenly divide down from 594MHz which rules out a significant number of resolution and refresh rates. The current clock tree looks something like: video_pll1 594000000 video_pll1_bypass 594000000 video_pll1_out 594000000 lcdif_pixel 148500000 Now that composite-8m supports determine_rate, we can allow lcdif_pixel to set the parent rate which then switches every clock in the chain to a new frequency when lcdif_pixel cannot evenly divide from video_pll1_out. Signed-off-by: Adam Ford diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index b618892170f2..075f643e3f35 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -468,7 +468,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev) hws[IMX8MM_CLK_PCIE1_PHY] = imx8m_clk_hw_composite("pcie1_phy", imx8mm_pcie1_phy_sels, base + 0xa380); hws[IMX8MM_CLK_PCIE1_AUX] = imx8m_clk_hw_composite("pcie1_aux", imx8mm_pcie1_aux_sels, base + 0xa400); hws[IMX8MM_CLK_DC_PIXEL] = imx8m_clk_hw_composite("dc_pixel", imx8mm_dc_pixel_sels, base + 0xa480); - hws[IMX8MM_CLK_LCDIF_PIXEL] = imx8m_clk_hw_composite("lcdif_pixel", imx8mm_lcdif_pixel_sels, base + 0xa500); + hws[IMX8MM_CLK_LCDIF_PIXEL] = imx8m_clk_hw_composite_flags("lcdif_pixel", imx8mm_lcdif_pixel_sels, base + 0xa500, CLK_SET_RATE_PARENT); hws[IMX8MM_CLK_SAI1] = imx8m_clk_hw_composite("sai1", imx8mm_sai1_sels, base + 0xa580); hws[IMX8MM_CLK_SAI2] = imx8m_clk_hw_composite("sai2", imx8mm_sai2_sels, base + 0xa600); hws[IMX8MM_CLK_SAI3] = imx8m_clk_hw_composite("sai3", imx8mm_sai3_sels, base + 0xa680); -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel