From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH v18 2/7] irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode
Date: Tue, 28 Mar 2023 09:22:18 +0530 [thread overview]
Message-ID: <20230328035223.1480939-3-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230328035223.1480939-1-apatel@ventanamicro.com>
Various RISC-V drivers (such as SBI IPI, SBI Timer, SBI PMU, and
KVM RISC-V) don't have associated DT node but these drivers need
standard per-CPU (local) interrupts defined by the RISC-V privileged
specification.
We add riscv_get_intc_hwnode() in arch/riscv which allows RISC-V
drivers not having DT node to discover INTC hwnode which in-turn
helps these drivers to map per-CPU (local) interrupts provided
by the INTC driver.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/include/asm/irq.h | 4 ++++
arch/riscv/kernel/irq.c | 18 ++++++++++++++++++
drivers/irqchip/irq-riscv-intc.c | 7 +++++++
3 files changed, 29 insertions(+)
diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h
index e4c435509983..43b9ebfbd943 100644
--- a/arch/riscv/include/asm/irq.h
+++ b/arch/riscv/include/asm/irq.h
@@ -12,6 +12,10 @@
#include <asm-generic/irq.h>
+void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void));
+
+struct fwnode_handle *riscv_get_intc_hwnode(void);
+
extern void __init init_IRQ(void);
#endif /* _ASM_RISCV_IRQ_H */
diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
index 7207fa08d78f..96d3171f0ca1 100644
--- a/arch/riscv/kernel/irq.c
+++ b/arch/riscv/kernel/irq.c
@@ -7,9 +7,27 @@
#include <linux/interrupt.h>
#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
#include <linux/seq_file.h>
#include <asm/smp.h>
+static struct fwnode_handle *(*__get_intc_node)(void);
+
+void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void))
+{
+ __get_intc_node = fn;
+}
+
+struct fwnode_handle *riscv_get_intc_hwnode(void)
+{
+ if (__get_intc_node)
+ return __get_intc_node();
+
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(riscv_get_intc_hwnode);
+
int arch_show_interrupts(struct seq_file *p, int prec)
{
show_ipi_stats(p, prec);
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 499e5f81b3fe..9066467e99e4 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -92,6 +92,11 @@ static const struct irq_domain_ops riscv_intc_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
+static struct fwnode_handle *riscv_intc_hwnode(void)
+{
+ return intc_domain->fwnode;
+}
+
static int __init riscv_intc_init(struct device_node *node,
struct device_node *parent)
{
@@ -126,6 +131,8 @@ static int __init riscv_intc_init(struct device_node *node,
return rc;
}
+ riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
+
cpuhp_setup_state(CPUHP_AP_IRQ_RISCV_STARTING,
"irqchip/riscv/intc:starting",
riscv_intc_cpu_starting,
--
2.34.1
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linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH v18 2/7] irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode
Date: Tue, 28 Mar 2023 09:22:18 +0530 [thread overview]
Message-ID: <20230328035223.1480939-3-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230328035223.1480939-1-apatel@ventanamicro.com>
Various RISC-V drivers (such as SBI IPI, SBI Timer, SBI PMU, and
KVM RISC-V) don't have associated DT node but these drivers need
standard per-CPU (local) interrupts defined by the RISC-V privileged
specification.
We add riscv_get_intc_hwnode() in arch/riscv which allows RISC-V
drivers not having DT node to discover INTC hwnode which in-turn
helps these drivers to map per-CPU (local) interrupts provided
by the INTC driver.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/include/asm/irq.h | 4 ++++
arch/riscv/kernel/irq.c | 18 ++++++++++++++++++
drivers/irqchip/irq-riscv-intc.c | 7 +++++++
3 files changed, 29 insertions(+)
diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h
index e4c435509983..43b9ebfbd943 100644
--- a/arch/riscv/include/asm/irq.h
+++ b/arch/riscv/include/asm/irq.h
@@ -12,6 +12,10 @@
#include <asm-generic/irq.h>
+void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void));
+
+struct fwnode_handle *riscv_get_intc_hwnode(void);
+
extern void __init init_IRQ(void);
#endif /* _ASM_RISCV_IRQ_H */
diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
index 7207fa08d78f..96d3171f0ca1 100644
--- a/arch/riscv/kernel/irq.c
+++ b/arch/riscv/kernel/irq.c
@@ -7,9 +7,27 @@
#include <linux/interrupt.h>
#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
#include <linux/seq_file.h>
#include <asm/smp.h>
+static struct fwnode_handle *(*__get_intc_node)(void);
+
+void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void))
+{
+ __get_intc_node = fn;
+}
+
+struct fwnode_handle *riscv_get_intc_hwnode(void)
+{
+ if (__get_intc_node)
+ return __get_intc_node();
+
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(riscv_get_intc_hwnode);
+
int arch_show_interrupts(struct seq_file *p, int prec)
{
show_ipi_stats(p, prec);
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 499e5f81b3fe..9066467e99e4 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -92,6 +92,11 @@ static const struct irq_domain_ops riscv_intc_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
+static struct fwnode_handle *riscv_intc_hwnode(void)
+{
+ return intc_domain->fwnode;
+}
+
static int __init riscv_intc_init(struct device_node *node,
struct device_node *parent)
{
@@ -126,6 +131,8 @@ static int __init riscv_intc_init(struct device_node *node,
return rc;
}
+ riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
+
cpuhp_setup_state(CPUHP_AP_IRQ_RISCV_STARTING,
"irqchip/riscv/intc:starting",
riscv_intc_cpu_starting,
--
2.34.1
next prev parent reply other threads:[~2023-03-28 3:52 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-28 3:52 [PATCH v18 0/7] RISC-V IPI Improvements Anup Patel
2023-03-28 3:52 ` Anup Patel
2023-03-28 3:52 ` [PATCH v18 1/7] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2023-03-28 3:52 ` Anup Patel
2023-04-08 10:45 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28 3:52 ` Anup Patel [this message]
2023-03-28 3:52 ` [PATCH v18 2/7] irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode Anup Patel
2023-04-08 10:45 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28 3:52 ` [PATCH v18 3/7] RISC-V: Treat IPIs as normal Linux IRQs Anup Patel
2023-03-28 3:52 ` Anup Patel
2023-04-08 10:45 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28 3:52 ` [PATCH v18 4/7] RISC-V: Allow marking IPIs as suitable for remote FENCEs Anup Patel
2023-03-28 3:52 ` Anup Patel
2023-04-08 10:45 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28 3:52 ` [PATCH v18 5/7] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2023-03-28 3:52 ` Anup Patel
2023-04-08 10:45 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28 3:52 ` [PATCH v18 6/7] RISC-V: Use IPIs for remote icache " Anup Patel
2023-03-28 3:52 ` Anup Patel
2023-04-08 10:45 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28 3:52 ` [PATCH v18 7/7] irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers Anup Patel
2023-03-28 3:52 ` Anup Patel
2023-04-08 10:45 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-03-28 3:56 ` [PATCH v18 0/7] RISC-V IPI Improvements Anup Patel
2023-03-28 3:56 ` Anup Patel
2023-05-08 14:41 ` patchwork-bot+linux-riscv
2023-05-08 14:41 ` patchwork-bot+linux-riscv
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