From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0E828476 for ; Tue, 28 Mar 2023 14:55:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 24A88C433EF; Tue, 28 Mar 2023 14:55:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1680015355; bh=Fmj3GXQ0MfvFPWQMLyj09CcA9vjy6HGTJVJ5PSxUX6I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XKFjzGGSBvAgAEKHBdn00BjGt54wJHOMfpkIVRrX20cYUakyXxt8GL9hG9yUpuiEF IS50mrDI7qX/rcRQH3SincLVOzJNdBlsd1P2lqBPmNyzs1kbe3oN6Ko5AOny1haHzz pBjvCkA4lqUNm+yGoVBz/c/jMTGUQH+vSiYp3abA= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Mario Limonciello , Samson Tam , Alvin Lee , Qingqing Zhuo , Saaem Rizvi , Daniel Wheeler , Alex Deucher , Sasha Levin Subject: [PATCH 6.1 009/224] drm/amd/display: Remove OTG DIV register write for Virtual signals. Date: Tue, 28 Mar 2023 16:40:05 +0200 Message-Id: <20230328142617.620011336@linuxfoundation.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230328142617.205414124@linuxfoundation.org> References: <20230328142617.205414124@linuxfoundation.org> User-Agent: quilt/0.67 Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Saaem Rizvi [ Upstream commit 709671ffb15dcd1b4f6afe2a9d8c67c7c4ead4a1 ] [WHY] Hot plugging and then hot unplugging leads to k1 and k2 values to change, as signal is detected as a virtual signal on hot unplug. Writing these values to OTG_PIXEL_RATE_DIV register might cause primary display to blank (known hw bug). [HOW] No longer write k1 and k2 values to register if signal is virtual, we have safe guards in place in the case that k1 and k2 is unassigned so that an unknown value is not written to the register either. Cc: stable@vger.kernel.org Cc: Mario Limonciello Reviewed-by: Samson Tam Reviewed-by: Alvin Lee Acked-by: Qingqing Zhuo Signed-off-by: Saaem Rizvi Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c index f108e82e70c8b..1a85509c12f23 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c @@ -1180,7 +1180,7 @@ unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsign *k2_div = PIXEL_RATE_DIV_BY_2; else *k2_div = PIXEL_RATE_DIV_BY_4; - } else if (dc_is_dp_signal(stream->signal) || dc_is_virtual_signal(stream->signal)) { + } else if (dc_is_dp_signal(stream->signal)) { if (two_pix_per_container) { *k1_div = PIXEL_RATE_DIV_BY_1; *k2_div = PIXEL_RATE_DIV_BY_2; -- 2.39.2