[lunn:v6.3-rc3-net-next-ethtool-eee-v5 /24] drivers/net/phy/phy-c45.c:1397: warning: expecting prototype for phy_eee_clk_stop_enable(). Prototype was for genphy_c45_eee_clk_stop_enable() instead

[kernel test robot <lkp@intel.com>]

tree:   https://github.com/lunn/linux.git v6.3-rc3-net-next-ethtool-eee-v5
head:   900606855a3fbafc543b01a40e85cc77333e55de
commit: 318d7117017d65c672d9a5ff93473035fa677366 [/24] net: phy: Add helper to set EEE Clock stop enable bit
config: s390-allyesconfig (https://download.01.org/0day-ci/archive/20230329/202303291029.SwY2Fht0-lkp@intel.com/config)
compiler: s390-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/lunn/linux/commit/318d7117017d65c672d9a5ff93473035fa677366
        git remote add lunn https://github.com/lunn/linux.git
        git fetch --no-tags lunn v6.3-rc3-net-next-ethtool-eee-v5
        git checkout 318d7117017d65c672d9a5ff93473035fa677366
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=s390 olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=s390 SHELL=/bin/bash drivers/net/phy/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303291029.SwY2Fht0-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/net/phy/phy-c45.c:1397: warning: expecting prototype for phy_eee_clk_stop_enable(). Prototype was for genphy_c45_eee_clk_stop_enable() instead


vim +1397 drivers/net/phy/phy-c45.c

  1388	
  1389	/**
  1390	 * phy_eee_clk_stop_enable - Clock should stop during LPI signalling
  1391	 * @phydev: target phy_device struct
  1392	 *
  1393	 * Description: Program the MMD register 3.0 setting the "Clock stop enable"
  1394	 * bit.
  1395	 */
  1396	int genphy_c45_eee_clk_stop_enable(struct phy_device *phydev)
> 1397	{
  1398		int ret;
  1399	
  1400		/* IEEE 802.3:2018 - 45.2.3.2.6 Clock stop capable (3.1.6) */
  1401		ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);
  1402		if (ret < 0)
  1403			return ret;
  1404	
  1405		if (ret & MDIO_STAT1_CLKSTOP_CAPABLE)
  1406			/* IEEE 802.3-2018 45.2.3.1.4 Clock stop enable (3.0.10) */
  1407			return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,
  1408						MDIO_PCS_CTRL1_CLKSTOP_EN);
  1409		return 0;
  1410	}
  1411	EXPORT_SYMBOL_GPL(genphy_c45_eee_clk_stop_enable);
  1412	

-- 
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