From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Maverickk 78 <maverickk1778@gmail.com>
Cc: qemu-devel <qemu-devel@nongnu.org>
Subject: Re: property 'cxl-type3.size' not found
Date: Mon, 3 Apr 2023 10:42:26 +0100 [thread overview]
Message-ID: <20230403104226.00001637@Huawei.com> (raw)
In-Reply-To: <CALfBBTuGSPYE_HV1ns_9T_Ud3BEAajhN2ivMCJ37f+hC1XOy+w@mail.gmail.com>
On Mon, 3 Apr 2023 14:34:33 +0530
Maverickk 78 <maverickk1778@gmail.com> wrote:
> Hello,
>
> I am trying qemu-system-aarch64 & cxl configuration listed in
>
> https://www.qemu.org/docs/master/system/devices/cxl.html
>
> qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8
> -cpu max \
> ...
> -object
> memory-backend-file,id=cxl-mem0,share=on,mem-path=/tmp/cxltest.raw,size=256M
> \
> -object
> memory-backend-file,id=cxl-mem1,share=on,mem-path=/tmp/cxltest1.raw,size=256M
> \
> -object
> memory-backend-file,id=cxl-mem2,share=on,mem-path=/tmp/cxltest2.raw,size=256M
> \
> -object
> memory-backend-file,id=cxl-mem3,share=on,mem-path=/tmp/cxltest3.raw,size=256M
> \
> -object
> memory-backend-file,id=cxl-lsa0,share=on,mem-path=/tmp/lsa0.raw,size=256M \
> -object
> memory-backend-file,id=cxl-lsa1,share=on,mem-path=/tmp/lsa1.raw,size=256M \
> -object
> memory-backend-file,id=cxl-lsa2,share=on,mem-path=/tmp/lsa2.raw,size=256M \
> -object
> memory-backend-file,id=cxl-lsa3,share=on,mem-path=/tmp/lsa3.raw,size=256M \
> -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
> -device cxl-rp,port=0,bus=cxl.1,id=root_port0,chassis=0,slot=0 \
> -device cxl-rp,port=1,bus=cxl.1,id=root_port1,chassis=0,slot=1 \
> -device cxl-upstream,bus=root_port0,id=us0 \
> -device cxl-downstream,port=0,bus=us0,id=swport0,chassis=0,slot=4 \
> -device
> cxl-type3,bus=swport0,memdev=cxl-mem0,lsa=cxl-lsa0,id=cxl-pmem0,size=256M \
> -device cxl-downstream,port=1,bus=us0,id=swport1,chassis=0,slot=5 \
> -device
> cxl-type3,bus=swport1,memdev=cxl-mem1,lsa=cxl-lsa1,id=cxl-pmem1,size=256M \
> -device cxl-downstream,port=2,bus=us0,id=swport2,chassis=0,slot=6 \
> -device
> cxl-type3,bus=swport2,memdev=cxl-mem2,lsa=cxl-lsa2,id=cxl-pmem2,size=256M \
> -device cxl-downstream,port=3,bus=us0,id=swport3,chassis=0,slot=7 \
> -device
> cxl-type3,bus=swport3,memdev=cxl-mem3,lsa=cxl-lsa3,id=cxl-pmem3,size=256M \
> -M
> cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G,cxl-fmw.0.interleave-granularity=4k
>
>
>
> I hit this following error
> qemu-system-aarch64: -device
> cxl-type3,bus=swport0,memdev=cxl-mem0,lsa=cxl-lsa0,id=cxl-pmem0,size=256M:
> property 'cxl-type3.size' not found
>
>
> Any clue if I am missing something?
Looks like docs have slipped behind current state. Size isn't needed for the memdev
any more as can be established from the memory backend and there isn't a reason
why they'd ever be different (there was in a much earlier version).
There is a known bigger issue with those docs which is that they got cherry picked
from a series that included ARM support but arm support hasn't landed yet
(and will be a while due to need for DT support).
I'll look at fixing both issues up. Or if you want to send a patch Raghu that would
be even better!
Jonathan
>
>
> Regards
>
next prev parent reply other threads:[~2023-04-03 9:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-03 9:04 property 'cxl-type3.size' not found Maverickk 78
2023-04-03 9:38 ` Philippe Mathieu-Daudé
2023-04-03 16:12 ` Fan Ni
2023-04-03 9:42 ` Jonathan Cameron via [this message]
2023-04-03 10:33 ` Maverickk 78
2023-04-03 14:26 ` Jonathan Cameron via
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