From: Shawn Guo <shawn.guo@linaro.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Marijn Suijten <marijn.suijten@somainline.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space
Date: Thu, 6 Apr 2023 12:08:20 +0800 [thread overview]
Message-ID: <20230406040820.GB111746@dragon> (raw)
In-Reply-To: <20230328-topic-msgram_mpm-v2-2-e24a48e57f0d@linaro.org>
On Wed, Apr 05, 2023 at 12:48:35PM +0200, Konrad Dybcio wrote:
> The MPM hardware is accessible to us from the ARM CPUs through a shared
> memory region (RPM MSG RAM) that's also concurrently accessed by other
> kinds of cores on the system (like modem, ADSP etc.). Modeling this
> relation in a (somewhat) sane manner in the device tree basically
> requires us to either present the MPM as a child of said memory region
> (which makes little sense, as a mapped memory carveout is not a bus),
> define nodes which bleed their register spaces into one another, or
> passing their slice of the MSG RAM through some kind of a property.
>
> Go with the third option and add a way to map a region passed through
> the "qcom,rpm-msg-ram" property as our register space.
>
> The current way of using 'reg' is preserved for ABI reasons.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
prev parent reply other threads:[~2023-04-06 4:08 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-05 10:48 [PATCH v2 0/2] Resolve MPM register space situation Konrad Dybcio
2023-04-05 10:48 ` [PATCH v2 1/2] dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle Konrad Dybcio
2023-04-05 12:22 ` Rob Herring
2023-04-05 13:47 ` Rob Herring
2023-04-05 13:49 ` Konrad Dybcio
2023-04-06 17:45 ` Krzysztof Kozlowski
2023-04-06 19:55 ` Konrad Dybcio
2023-04-07 7:00 ` Krzysztof Kozlowski
2023-04-07 11:36 ` Stephan Gerhold
2023-04-12 11:47 ` Konrad Dybcio
2023-04-12 11:55 ` Krzysztof Kozlowski
2023-04-12 12:09 ` Konrad Dybcio
2023-04-12 16:53 ` Krzysztof Kozlowski
2023-04-12 17:06 ` Konrad Dybcio
2023-04-13 8:50 ` Krzysztof Kozlowski
2023-05-18 12:54 ` Konrad Dybcio
2023-04-05 10:48 ` [PATCH v2 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space Konrad Dybcio
2023-04-06 4:08 ` Shawn Guo [this message]
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