From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<dan.j.williams@intel.com>, <ira.weiny@intel.com>,
<vishal.l.verma@intel.com>, <alison.schofield@intel.com>,
<rafael@kernel.org>, <lukas@wunner.de>
Subject: Re: [PATCH v4 06/23] cxl: Add callback to parse the DSLBIS subtable from CDAT
Date: Thu, 20 Apr 2023 12:40:43 +0100 [thread overview]
Message-ID: <20230420124043.00004e0e@Huawei.com> (raw)
In-Reply-To: <168193569717.1178687.294428469465996536.stgit@djiang5-mobl3>
On Wed, 19 Apr 2023 13:21:37 -0700
Dave Jiang <dave.jiang@intel.com> wrote:
> Provide a callback to parse the Device Scoped Latency and Bandwidth
> Information Structure (DSLBIS) in the CDAT structures. The DSLBIS
> contains the bandwidth and latency information that's tied to a DSMAS
> handle. The driver will retrieve the read and write latency and
> bandwidth associated with the DSMAS which is tied to a DPA range.
>
> Coherent Device Attribute Table 1.03 2.1 Device Scoped Latency and
> Bandwidth Information Structure (DSLBIS)
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>
One comment inline.
> +/* Flags for DSLBIS subtable */
> +#define DSLBIS_MEM_MASK GENMASK(3, 0)
> +#define DSLBIS_MEM_MEMORY 0
> +
> int devm_cxl_port_enumerate_dports(struct cxl_port *port);
> struct cxl_dev_state;
> int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
> @@ -136,5 +164,9 @@ cdat_table_parse(dsmas);
> cdat_table_parse(dslbis);
> cdat_table_parse(sslbis);
>
> -int cxl_dsmas_parse_entry(struct cdat_entry_header *header, void *arg);
> +#define cxl_parse_entry(x) \
> +int cxl_##x##_parse_entry(struct cdat_entry_header *header, void *arg)
I'm not sure this is worthwhile. What was your reasoning for it?
Also wrecks typing that arg argument as I suggested earlier...
> +
> +cxl_parse_entry(dsmas);
> +cxl_parse_entry(dslbis);
next prev parent reply other threads:[~2023-04-20 11:40 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-19 20:21 [PATCH v4 00/23] cxl: Add support for QTG ID retrieval for CXL subsystem Dave Jiang
2023-04-19 20:21 ` [PATCH v4 01/23] cxl: Export QTG ids from CFMWS to sysfs Dave Jiang
2023-04-20 8:51 ` Jonathan Cameron
2023-04-20 20:53 ` Dave Jiang
2023-04-24 21:46 ` Dan Williams
2023-04-26 23:14 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 02/23] cxl: Add checksum verification to CDAT from CXL Dave Jiang
2023-04-20 8:55 ` Jonathan Cameron
2023-04-24 22:01 ` Dan Williams
2023-04-26 23:24 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 03/23] cxl: Add support for reading CXL switch CDAT table Dave Jiang
2023-04-20 9:25 ` Jonathan Cameron
2023-04-24 22:08 ` Dan Williams
2023-04-27 15:55 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 04/23] cxl: Add common helpers for cdat parsing Dave Jiang
2023-04-20 9:41 ` Jonathan Cameron
2023-04-20 21:05 ` Dave Jiang
2023-04-21 16:06 ` Jonathan Cameron
2023-04-21 16:12 ` Dave Jiang
2023-04-24 22:33 ` Dan Williams
2023-04-25 16:00 ` Dave Jiang
2023-04-27 0:09 ` Dan Williams
2023-04-19 20:21 ` [PATCH v4 05/23] cxl: Add callback to parse the DSMAS subtables from CDAT Dave Jiang
2023-04-20 11:33 ` Jonathan Cameron
2023-04-20 11:35 ` Jonathan Cameron
2023-04-20 23:25 ` Dave Jiang
2023-04-24 22:38 ` Dan Williams
2023-04-26 3:44 ` Li, Ming
2023-04-26 18:27 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 06/23] cxl: Add callback to parse the DSLBIS subtable " Dave Jiang
2023-04-20 11:40 ` Jonathan Cameron [this message]
2023-04-20 23:25 ` Dave Jiang
2023-04-24 22:46 ` Dan Williams
2023-04-24 22:59 ` Dave Jiang
2023-04-19 20:21 ` [PATCH v4 07/23] cxl: Add callback to parse the SSLBIS " Dave Jiang
2023-04-20 11:50 ` Jonathan Cameron
2023-04-24 23:38 ` Dan Williams
2023-04-19 20:21 ` [PATCH v4 08/23] cxl: Add support for _DSM Function for retrieving QTG ID Dave Jiang
2023-04-20 12:00 ` Jonathan Cameron
2023-04-21 0:11 ` Dave Jiang
2023-04-21 16:07 ` Jonathan Cameron
2023-04-25 0:12 ` Dan Williams
2023-04-19 20:21 ` [PATCH v4 09/23] cxl: Add helper function to retrieve ACPI handle of CXL root device Dave Jiang
2023-04-20 12:06 ` Jonathan Cameron
2023-04-21 23:24 ` Dave Jiang
2023-04-25 0:18 ` Dan Williams
2023-04-19 20:22 ` [PATCH v4 10/23] cxl: Add helpers to calculate pci latency for the CXL device Dave Jiang
2023-04-20 12:15 ` Jonathan Cameron
2023-04-25 0:30 ` Dan Williams
2023-05-01 16:29 ` Dave Jiang
2023-04-19 20:22 ` [PATCH v4 11/23] cxl: Add helper function that calculates QoS values for switches Dave Jiang
2023-04-20 12:26 ` Jonathan Cameron
2023-04-24 17:09 ` Dave Jiang
2023-04-24 17:31 ` Dave Jiang
2023-04-24 21:59 ` Jonathan Cameron
2023-04-25 0:33 ` Dan Williams
2023-04-19 20:22 ` [PATCH v4 12/23] cxl: Add helper function that calculate QoS values for PCI path Dave Jiang
2023-04-20 12:32 ` Jonathan Cameron
2023-04-25 0:45 ` Dan Williams
2023-04-19 20:22 ` [PATCH v4 13/23] ACPI: NUMA: Create enum for memory_target hmem_attrs indexing Dave Jiang
2023-04-19 20:22 ` [PATCH v4 14/23] ACPI: NUMA: Add genport target allocation to the HMAT parsing Dave Jiang
2023-04-19 20:22 ` [PATCH v4 15/23] ACPI: NUMA: Add setting of generic port locality attributes Dave Jiang
2023-04-19 20:22 ` [PATCH v4 16/23] ACPI: NUMA: Add helper function to retrieve the performance attributes Dave Jiang
2023-04-19 20:22 ` [PATCH v4 17/23] cxl: Add helper function to retrieve generic port QoS Dave Jiang
2023-04-19 20:22 ` [PATCH v4 18/23] cxl: Add latency and bandwidth calculations for the CXL path Dave Jiang
2023-04-19 20:22 ` [PATCH v4 19/23] cxl: Wait Memory_Info_Valid before access memory related info Dave Jiang
2023-04-19 20:23 ` [PATCH v4 20/23] cxl: Move identify and partition query from pci probe to port probe Dave Jiang
2023-04-19 20:23 ` [PATCH v4 21/23] cxl: Store QTG IDs and related info to the CXL memory device context Dave Jiang
2023-04-19 20:23 ` [PATCH v4 22/23] cxl: Export sysfs attributes for memory device QTG ID Dave Jiang
2023-04-19 20:23 ` [PATCH v4 23/23] cxl/mem: Add debugfs output for QTG related data Dave Jiang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230420124043.00004e0e@Huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=alison.schofield@intel.com \
--cc=dan.j.williams@intel.com \
--cc=dave.jiang@intel.com \
--cc=ira.weiny@intel.com \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-cxl@vger.kernel.org \
--cc=lukas@wunner.de \
--cc=rafael@kernel.org \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.