From: Neha Malcom Francis <n-francis@ti.com>
To: <u-boot@lists.denx.de>, <trini@konsulko.com>, <sjg@chromium.org>,
<afd@ti.com>, <vigneshr@ti.com>, <rogerq@kernel.org>
Cc: <n-francis@ti.com>, <alpernebiyasak@gmail.com>, <nm@ti.com>,
<bb@ti.com>, <u-kumar1@ti.com>
Subject: [PATCH v3 04/19] j721e: schema: yaml: Add general schema and J721E board config files
Date: Fri, 21 Apr 2023 18:01:48 +0530 [thread overview]
Message-ID: <20230421123203.1315330-5-n-francis@ti.com> (raw)
In-Reply-To: <20230421123203.1315330-1-n-francis@ti.com>
Schema file in YAML must be provided in board/ti/common for validating
input config files and packaging system firmware. The schema includes
entries for rm-cfg, board-cfg, pm-cfg and sec-cfg.
Board config files must be provided in board/ti/<devicename> in YAML.
These can then be consumed for generation of binaries to package system
firmware. Added YAML configs for J721E in particular.
Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/common/schema.yaml | 355 +++++
board/ti/j721e/board-cfg.yaml | 37 +
board/ti/j721e/pm-cfg.yaml | 13 +
board/ti/j721e/rm-cfg.yaml | 2757 +++++++++++++++++++++++++++++++++
board/ti/j721e/sec-cfg.yaml | 379 +++++
5 files changed, 3541 insertions(+)
create mode 100644 board/ti/common/schema.yaml
create mode 100644 board/ti/j721e/board-cfg.yaml
create mode 100644 board/ti/j721e/pm-cfg.yaml
create mode 100644 board/ti/j721e/rm-cfg.yaml
create mode 100644 board/ti/j721e/sec-cfg.yaml
diff --git a/board/ti/common/schema.yaml b/board/ti/common/schema.yaml
new file mode 100644
index 0000000000..070ff797e0
--- /dev/null
+++ b/board/ti/common/schema.yaml
@@ -0,0 +1,355 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Config schema for TI K3 devices
+#
+
+---
+
+definitions:
+ u8:
+ type: integer
+ minimum: 0
+ maximum: 0xff
+ u16:
+ type: integer
+ minimum: 0
+ maximum: 0xffff
+ u32:
+ type: integer
+ minimum: 0
+ maximum: 0xffffffff
+
+
+
+type: object
+properties:
+ pm-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ board-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ control:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ main_isolation_enable:
+ $ref: "#/definitions/u8"
+ main_isolation_hostid:
+ $ref: "#/definitions/u16"
+
+
+ secproxy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ scaling_factor:
+ $ref: "#/definitions/u8"
+ scaling_profile:
+ $ref: "#/definitions/u8"
+ disable_main_nav_secure_proxy:
+ $ref: "#/definitions/u8"
+
+ msmc:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ msmc_cache_size:
+ $ref: "#/definitions/u8"
+ debug_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ trace_dst_enables:
+ $ref: "#/definitions/u16"
+ trace_src_enables:
+ $ref: "#/definitions/u16"
+
+ sec-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+
+ processor_acl_list:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ proc_acl_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ processor_id:
+ $ref: "#/definitions/u8"
+ proc_access_master:
+ $ref: "#/definitions/u8"
+ proc_access_secondary:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+ host_hierarchy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ host_hierarchy_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ supervisor_host_id:
+ $ref: "#/definitions/u8"
+
+ otp_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ otp_entry:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ host_perms:
+ $ref: "#/definitions/u8"
+ write_host_id:
+ $ref: "#/definitions/u8"
+
+ dkek_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allowed_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ allow_dkek_export_tisci:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+
+ sa2ul_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ rsvd:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ sec_dbg_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allow_jtag_unlock:
+ $ref: "#/definitions/u8"
+ allow_wildcard_unlock:
+ $ref: "#/definitions/u8"
+ allowed_debug_level_rsvd:
+ $ref: "#/definitions/u8"
+ rsvd:
+ $ref: "#/definitions/u8"
+ min_cert_rev:
+ $ref: "#/definitions/u32"
+ jtag_unlock_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+
+
+ sec_handover_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ handover_msg_sender:
+ $ref: "#/definitions/u8"
+ handover_to_host_id:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+
+ rm-cfg:
+ type: object
+ properties:
+ rm_boardcfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+
+ host_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ host_cfg_entries:
+ type: array
+ minItems: 0
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ allowed_atype:
+ $ref: "#/definitions/u8"
+ allowed_qos:
+ $ref: "#/definitions/u16"
+ allowed_orderid:
+ $ref: "#/definitions/u32"
+ allowed_priority:
+ $ref: "#/definitions/u16"
+ allowed_sched_priority:
+ $ref: "#/definitions/u8"
+ resasg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ resasg_entries_size:
+ $ref: "#/definitions/u16"
+ reserved:
+ $ref: "#/definitions/u16"
+
+ resasg_entries:
+ type: array
+ minItems: 0
+ maxItems: 418
+ items:
+ type: object
+ properties:
+ start_resource:
+ $ref: "#/definitions/u16"
+ num_resource:
+ $ref: "#/definitions/u16"
+ type:
+ $ref: "#/definitions/u16"
+ host_id:
+ $ref: "#/definitions/u8"
+ reserved:
+ $ref: "#/definitions/u8"
diff --git a/board/ti/j721e/board-cfg.yaml b/board/ti/j721e/board-cfg.yaml
new file mode 100644
index 0000000000..9f5e00b3dc
--- /dev/null
+++ b/board/ti/j721e/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J721E
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size: 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
+
diff --git a/board/ti/j721e/pm-cfg.yaml b/board/ti/j721e/pm-cfg.yaml
new file mode 100644
index 0000000000..40a8dfb7af
--- /dev/null
+++ b/board/ti/j721e/pm-cfg.yaml
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for J721E
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+
diff --git a/board/ti/j721e/rm-cfg.yaml b/board/ti/j721e/rm-cfg.yaml
new file mode 100644
index 0000000000..2fc41f5e87
--- /dev/null
+++ b/board/ti/j721e/rm-cfg.yaml
@@ -0,0 +1,2757 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for J721E
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size: 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #2
+ host_id: 5
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #3
+ host_id: 12
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #4
+ host_id: 13
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #5
+ host_id: 21
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #6
+ host_id: 26
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #7
+ host_id: 28
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #8
+ host_id: 35
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #9
+ host_id: 37
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #10
+ host_id: 40
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #11
+ host_id: 42
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size: 8
+ resasg_entries_size: 3344
+ reserved: 0
+ resasg_entries:
+ -
+ start_resource: 4
+ num_resource: 93
+ type: 7744
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 4
+ num_resource: 93
+ type: 7808
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 7872
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 8192
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 32
+ type: 8192
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 8320
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 24
+ type: 8320
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8384
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8384
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 8384
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 8384
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 8384
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 8384
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 8384
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 8384
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 40
+ num_resource: 12
+ type: 8384
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 52
+ num_resource: 12
+ type: 8384
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 128
+ type: 8576
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 128
+ num_resource: 128
+ type: 8576
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 128
+ type: 8640
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 128
+ num_resource: 128
+ type: 8640
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 48
+ type: 8704
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8768
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8768
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 6
+ type: 8768
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 22
+ num_resource: 6
+ type: 8768
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 2
+ type: 8768
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 2
+ type: 8768
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13258
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 20480
+ num_resource: 1024
+ type: 13261
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 64
+ type: 13322
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 22528
+ num_resource: 1024
+ type: 13325
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 38
+ num_resource: 86
+ type: 13386
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 124
+ num_resource: 32
+ type: 13386
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 156
+ num_resource: 12
+ type: 13386
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 168
+ num_resource: 12
+ type: 13386
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 180
+ num_resource: 12
+ type: 13386
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 192
+ num_resource: 12
+ type: 13386
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 204
+ num_resource: 12
+ type: 13386
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 216
+ num_resource: 28
+ type: 13386
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 244
+ num_resource: 8
+ type: 13386
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 252
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diff --git a/board/ti/j721e/sec-cfg.yaml b/board/ti/j721e/sec-cfg.yaml
new file mode 100644
index 0000000000..0f62e51e9f
--- /dev/null
+++ b/board/ti/j721e/sec-cfg.yaml
@@ -0,0 +1,379 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security configuration for J721E
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ write_host_id: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size: 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]
+
--
2.34.1
next prev parent reply other threads:[~2023-04-21 13:03 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-21 12:31 [PATCH v3 00/19] Migration to using binman for bootloader Neha Malcom Francis
2023-04-21 12:31 ` [PATCH v3 01/19] binman: ti-board-config: Add support for TI board config binaries Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-25 6:24 ` Neha Malcom Francis
2023-04-25 18:01 ` Simon Glass
2023-04-26 19:44 ` [PATCH 1/2] buildman: Create a requirements.txt file Tom Rini
2023-04-26 19:44 ` [PATCH 2/2] CI: Make use of buildman requirements.txt Tom Rini
2023-04-27 16:25 ` Simon Glass
2023-05-03 5:57 ` Neha Malcom Francis
2023-05-03 13:04 ` Tom Rini
2023-05-04 4:12 ` Neha Malcom Francis
2023-05-04 13:02 ` Tom Rini
2023-05-05 5:02 ` Neha Malcom Francis
2023-04-27 16:25 ` [PATCH 1/2] buildman: Create a requirements.txt file Simon Glass
2023-04-21 12:31 ` [PATCH v3 02/19] binman: ti-secure: Add support for TI signing Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-21 12:31 ` [PATCH v3 03/19] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-25 7:20 ` Neha Malcom Francis
2023-04-21 12:31 ` Neha Malcom Francis [this message]
2023-04-21 12:31 ` [PATCH v3 05/19] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-21 12:31 ` [PATCH v3 06/19] j7200: yaml: Add J7200 board config files Neha Malcom Francis
2023-04-21 12:31 ` [PATCH v3 07/19] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-21 12:31 ` [PATCH v3 08/19] am65x: yaml: Add AM65x board config files Neha Malcom Francis
2023-04-21 12:31 ` [PATCH v3 09/19] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-25 7:26 ` Neha Malcom Francis
2023-04-25 18:01 ` Simon Glass
2023-04-21 12:31 ` [PATCH v3 10/19] am64x: yaml: Add board configs for AM64x Neha Malcom Francis
2023-04-21 12:31 ` [PATCH v3 11/19] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-25 7:31 ` Neha Malcom Francis
2023-04-25 18:46 ` Andrew Davis
2023-04-25 19:23 ` Simon Glass
2023-04-21 12:31 ` [PATCH v3 12/19] j721s2: yaml: Add board configs for J721S2 Neha Malcom Francis
2023-04-21 12:31 ` [PATCH v3 13/19] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-21 12:31 ` [PATCH v3 14/19] am62: yaml: Add board configs for AM62 Neha Malcom Francis
2023-04-21 12:31 ` [PATCH v3 15/19] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-21 12:32 ` [PATCH v3 16/19] am62a: yaml: Add board configs for AM62ax Neha Malcom Francis
2023-04-21 12:32 ` [PATCH v3 17/19] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-21 12:32 ` [PATCH v3 18/19] k3: tools: config.mk: Update makefile and remove scripts Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-21 12:32 ` [PATCH v3 19/19] doc: board: ti: Update documentation for binman flow Neha Malcom Francis
2023-04-24 19:42 ` Simon Glass
2023-04-24 20:49 ` Tom Rini
2023-04-25 5:38 ` Heinrich Schuchardt
2023-04-25 7:36 ` Neha Malcom Francis
2023-04-25 6:23 ` Neha Malcom Francis
2023-04-26 22:37 ` [PATCH v3 00/19] Migration to using binman for bootloader Tom Rini
2023-05-03 7:27 ` Neha Malcom Francis
2023-05-03 12:56 ` Neha Malcom Francis
2023-05-03 16:34 ` Jan Kiszka
2023-05-04 4:43 ` Neha Malcom Francis
2023-05-04 6:13 ` Neha Malcom Francis
2023-05-04 7:45 ` Jan Kiszka
2023-05-07 12:11 ` Jan Kiszka
2023-05-08 5:05 ` Neha Malcom Francis
2023-05-09 8:58 ` Jan Kiszka
2023-05-03 13:57 ` Tom Rini
2023-05-04 5:40 ` Manorit Chawdhry
2023-05-16 4:59 ` Neha Malcom Francis
2023-05-04 8:38 ` Christian Gmeiner
2023-05-04 9:37 ` Neha Malcom Francis
2023-05-05 18:29 ` Christian Gmeiner
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