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From: Conor Dooley <conor.dooley@microchip.com>
To: Yu-Chien Peter Lin <peterlin@andestech.com>
Cc: Conor Dooley <conor@kernel.org>, <qemu-devel@nongnu.org>,
	<ycliang@andestech.com>, <dylan@andestech.com>
Subject: Re: [PATCH] target/riscv: Fix PMU node property for virt machine
Date: Thu, 27 Apr 2023 11:04:38 +0100	[thread overview]
Message-ID: <20230427-reverse-boozy-27c706ede00b@wendy> (raw)
In-Reply-To: <ZEoH8j6nbbQ5xlyS@APC323>

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On Thu, Apr 27, 2023 at 01:28:18PM +0800, Yu-Chien Peter Lin wrote:
> Hi Conor,
> 
> Thank you for your prompt response.
> 
> On Fri, Apr 21, 2023 at 06:59:40PM +0100, Conor Dooley wrote:
> > On Fri, Apr 21, 2023 at 09:14:37PM +0800, Yu Chien Peter Lin wrote:
> > > The length of fdt_event_ctr_map[20] will add 5 dummy cells in
> > > "riscv,event-to-mhpmcounters" property, so directly initialize
> > > the array without an explicit size.
> > > 
> > > This patch also fixes the typo of PMU cache operation result ID
> > > of MISS (0x1) in the comments, and renames event idx 0x10021 to
> > > RISCV_PMU_EVENT_CACHE_ITLB_READ_MISS.
> > > 
> > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> > > ---
> > > 
> > >   $ ./build/qemu-system-riscv64 -M virt,dumpdtb=/tmp/virt.dtb -cpu rv64,sscofpmf=on && dtc /tmp/virt.dtb | grep mhpmcounters
> > >   [...]
> > >     riscv,event-to-mhpmcounters = <0x01 0x01 0x7fff9 
> > >                                    0x02 0x02 0x7fffc
> > >                                    0x10019 0x10019 0x7fff8
> > >                                    0x1001b 0x1001b 0x7fff8
> > >                                    0x10021 0x10021 0x7fff8
> > >                dummy cells --->    0x00 0x00 0x00 0x00 0x00>;
> > > 
> > > This won't break the OpenSBI, but will cause it to incorrectly increment
> > > num_hw_events [1] to 6, and DT validation failure in kernel [2].
> > > 
> > >   $ dt-validate -p Documentation/devicetree/bindings/processed-schema.json virt.dtb
> > >   [...]
> > >   virt.dtb: soc: pmu: {'riscv,event-to-mhpmcounters': [[1, 1, 524281], [2, 2, 524284], [65561, 65561, 524280], [65563, 65563, 524280], [65569, 65569, 524280], [0, 0, 0], [0, 0]], 'compatible': ['riscv,pmu']} should not be valid under {'type': 'object'}
> > 
> > I would note that this warning here does not go away with this patch ^^
> > It's still on my todo list, unless you want to fix it!
> 
> I don't fully understand the warning raised by simple-bus.yaml
> is it reasonable to move pmu out of soc node?

If it has no reg properties, it should not be on the soc bus.
I previously made similar changes to other nodes, see commit
ae29379998 ("hw/riscv: virt: fix syscon subnode paths"), as I think it
is indeed the same change here.

Cheers,
Conor.

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      reply	other threads:[~2023-04-27 10:05 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-21 13:14 [PATCH] target/riscv: Fix PMU node property for virt machine Yu Chien Peter Lin
2023-04-21 17:59 ` Conor Dooley
2023-04-27  5:28   ` Yu-Chien Peter Lin
2023-04-27 10:04     ` Conor Dooley [this message]

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