All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rohan McLure <rmclure@linux.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Rohan McLure <rmclure@linux.ibm.com>, npiggin@gmail.com, arnd@arndb.de
Subject: [PATCH 12/12] powerpc: Mark asynchronous accesses to irq_data
Date: Mon,  8 May 2023 12:01:20 +1000	[thread overview]
Message-ID: <20230508020120.218494-13-rmclure@linux.ibm.com> (raw)
In-Reply-To: <20230508020120.218494-1-rmclure@linux.ibm.com>

KCSAN revealed that while irq_data entries are written to either from
behind a mutex, or otherwise atomically, accesses to irq_data->hwirq can
occur asynchronously, without volatile annotation. Mark these accesses
with READ_ONCE to avoid unfortunate compiler reorderings and remove
KCSAN warnings.

Signed-off-by: Rohan McLure <rmclure@linux.ibm.com>
---
 arch/powerpc/kernel/irq.c                 |  2 +-
 arch/powerpc/platforms/powernv/pci-ioda.c | 12 ++++++------
 include/linux/irq.h                       |  2 +-
 kernel/irq/irqdomain.c                    |  4 ++--
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 6f7d4edaa0bc..4ac192755510 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -353,7 +353,7 @@ void do_softirq_own_stack(void)
 irq_hw_number_t virq_to_hw(unsigned int virq)
 {
 	struct irq_data *irq_data = irq_get_irq_data(virq);
-	return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
+	return WARN_ON(!irq_data) ? 0 : READ_ONCE(irq_data->hwirq);
 }
 EXPORT_SYMBOL_GPL(virq_to_hw);
 
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index f851f4983423..141491e86bba 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1986,7 +1986,7 @@ int64_t pnv_opal_pci_msi_eoi(struct irq_data *d)
 	struct pci_controller *hose = irq_data_get_irq_chip_data(d->parent_data);
 	struct pnv_phb *phb = hose->private_data;
 
-	return opal_pci_msi_eoi(phb->opal_id, d->parent_data->hwirq);
+	return opal_pci_msi_eoi(phb->opal_id, READ_ONCE(d->parent_data->hwirq));
 }
 
 /*
@@ -2162,11 +2162,11 @@ static void pnv_msi_compose_msg(struct irq_data *d, struct msi_msg *msg)
 	struct pnv_phb *phb = hose->private_data;
 	int rc;
 
-	rc = __pnv_pci_ioda_msi_setup(phb, pdev, d->hwirq,
+	rc = __pnv_pci_ioda_msi_setup(phb, pdev, READ_ONCE(d->hwirq),
 				      entry->pci.msi_attrib.is_64, msg);
 	if (rc)
 		dev_err(&pdev->dev, "Failed to setup %s-bit MSI #%ld : %d\n",
-			entry->pci.msi_attrib.is_64 ? "64" : "32", d->hwirq, rc);
+			entry->pci.msi_attrib.is_64 ? "64" : "32", data_race(d->hwirq), rc);
 }
 
 /*
@@ -2184,7 +2184,7 @@ static void pnv_msi_eoi(struct irq_data *d)
 		 * since it is translated into a vector number in
 		 * OPAL, use that directly.
 		 */
-		WARN_ON_ONCE(opal_pci_msi_eoi(phb->opal_id, d->hwirq));
+		WARN_ON_ONCE(opal_pci_msi_eoi(phb->opal_id, READ_ONCE(d->hwirq)));
 	}
 
 	irq_chip_eoi_parent(d);
@@ -2263,9 +2263,9 @@ static void pnv_irq_domain_free(struct irq_domain *domain, unsigned int virq,
 	struct pnv_phb *phb = hose->private_data;
 
 	pr_debug("%s bridge %pOF %d/%lx #%d\n", __func__, hose->dn,
-		 virq, d->hwirq, nr_irqs);
+		 virq, data_race(d->hwirq), nr_irqs);
 
-	msi_bitmap_free_hwirqs(&phb->msi_bmp, d->hwirq, nr_irqs);
+	msi_bitmap_free_hwirqs(&phb->msi_bmp, READ_ONCE(d->hwirq), nr_irqs);
 	/* XIVE domain is cleared through ->msi_free() */
 }
 
diff --git a/include/linux/irq.h b/include/linux/irq.h
index b1b28affb32a..a6888bcb3c5b 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -452,7 +452,7 @@ static inline bool irqd_affinity_on_activate(struct irq_data *d)
 
 static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
 {
-	return d->hwirq;
+	return READ_ONCE(d->hwirq);
 }
 
 /**
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index f34760a1e222..dd9054494f84 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -549,7 +549,7 @@ static void irq_domain_disassociate(struct irq_domain *domain, unsigned int irq)
 		 "virq%i doesn't exist; cannot disassociate\n", irq))
 		return;
 
-	hwirq = irq_data->hwirq;
+	hwirq = READ_ONCE(irq_data->hwirq);
 
 	mutex_lock(&domain->root->mutex);
 
@@ -948,7 +948,7 @@ struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain,
 	if (irq_domain_is_nomap(domain)) {
 		if (hwirq < domain->hwirq_max) {
 			data = irq_domain_get_irq_data(domain, hwirq);
-			if (data && data->hwirq == hwirq)
+			if (data && READ_ONCE(data->hwirq) == hwirq)
 				desc = irq_data_to_desc(data);
 			if (irq && desc)
 				*irq = hwirq;
-- 
2.37.2


      parent reply	other threads:[~2023-05-08  2:08 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-08  2:01 [PATCH 00/12] powerpc: KCSAN fix warnings and mark accesses Rohan McLure
2023-05-08  2:01 ` [PATCH 01/12] powerpc: qspinlock: Fix qnode->locked value interpretation Rohan McLure
2023-05-09  2:01   ` Nicholas Piggin
2023-05-09  4:26     ` Rohan McLure
2023-05-08  2:01 ` [PATCH 02/12] powerpc: qspinlock: Mark accesses to qnode lock checks Rohan McLure
2023-05-09  2:02   ` Nicholas Piggin
2023-05-08  2:01 ` [PATCH 03/12] powerpc: qspinlock: Enforce qnode writes prior to publishing to queue Rohan McLure
2023-05-09  2:04   ` Nicholas Piggin
2023-05-09  5:26     ` Rohan McLure
2023-05-09  6:45       ` Nicholas Piggin
2023-05-08  2:01 ` [PATCH 04/12] asm-generic/mmiowb: Mark accesses to fix KCSAN warnings Rohan McLure
2023-05-08  6:30   ` Arnd Bergmann
2023-05-08 15:44   ` [PATCH 4/12] " Gautam Menghani
2023-05-09  2:16   ` [PATCH 04/12] " Nicholas Piggin
2023-05-08  2:01 ` [PATCH 05/12] powerpc: Mark [h]ssr_valid accesses in check_return_regs_valid Rohan McLure
2023-05-09  2:17   ` Nicholas Piggin
2023-05-08  2:01 ` [PATCH 06/12] powerpc: Mark accesses to power_save callback in arch_cpu_idle Rohan McLure
2023-05-09  2:21   ` Nicholas Piggin
2023-05-08  2:01 ` [PATCH 07/12] powerpc: powernv: Fix KCSAN datarace warnings on idle_state contention Rohan McLure
2023-05-09  2:26   ` Nicholas Piggin
2023-05-10  2:00     ` Rohan McLure
2023-05-08  2:01 ` [PATCH 08/12] powerpc: Annotate accesses to ipi message flags Rohan McLure
2023-05-09  2:28   ` Nicholas Piggin
2023-05-08  2:01 ` [PATCH 09/12] powerpc: Mark writes registering ipi to host cpu through kvm Rohan McLure
2023-05-09  2:30   ` Nicholas Piggin
2023-05-08  2:01 ` [PATCH 10/12] powerpc: powernv: Annotate data races in opal events Rohan McLure
2023-05-09  2:31   ` Nicholas Piggin
2023-05-08  2:01 ` [PATCH 11/12] powerpc: powernv: Annotate asynchronous access to opal tokens Rohan McLure
2023-05-08  2:01 ` Rohan McLure [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230508020120.218494-13-rmclure@linux.ibm.com \
    --to=rmclure@linux.ibm.com \
    --cc=arnd@arndb.de \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=npiggin@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.