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From: Sam Edwards <cfsworks@gmail.com>
To: Andre Przywara <andre.przywara@arm.com>
Cc: u-boot@lists.denx.de, Maksim Kiselev <bigunclemax@gmail.com>,
	Sam Edwards <CFSworks@gmail.com>
Subject: [RFC PATCH 2/4] sunxi: psci: clean away preprocessor macros
Date: Thu,  1 Jun 2023 15:48:12 -0600	[thread overview]
Message-ID: <20230601214814.128336-3-CFSworks@gmail.com> (raw)
In-Reply-To: <20230601214814.128336-1-CFSworks@gmail.com>

This patch restructures psci.c to get away from the "many different
function definitions switched by #ifdef" paradigm to the preferred style
of having a single function definition with `if (IS_ENABLED(...))` to
make the optimizer include only the appropriate function bodies instead.

There are no functional changes here.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
---
 arch/arm/cpu/armv7/sunxi/psci.c | 94 ++++++++++++++-------------------
 1 file changed, 41 insertions(+), 53 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index f866025c37..e6b73ebf2b 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -76,28 +76,24 @@ static void __secure __mdelay(u32 ms)
 	isb();
 }
 
-static void __secure clamp_release(u32 __maybe_unused *clamp)
+static void __secure clamp_release(u32 *clamp)
 {
-#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
-	defined(CONFIG_MACH_SUN8I_H3) || \
-	defined(CONFIG_MACH_SUN8I_R40)
-	u32 tmp = 0x1ff;
-	do {
-		tmp >>= 1;
-		writel(tmp, clamp);
-	} while (tmp);
-
-	__mdelay(10);
-#endif
+	if (clamp) {
+		u32 tmp = 0x1ff;
+		do {
+			tmp >>= 1;
+			writel(tmp, clamp);
+		} while (tmp);
+
+		__mdelay(10);
+	}
 }
 
-static void __secure clamp_set(u32 __maybe_unused *clamp)
+static void __secure clamp_set(u32 *clamp)
 {
-#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
-	defined(CONFIG_MACH_SUN8I_H3) || \
-	defined(CONFIG_MACH_SUN8I_R40)
-	writel(0xff, clamp);
-#endif
+	if (clamp) {
+		writel(0xff, clamp);
+	}
 }
 
 static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on,
@@ -118,53 +114,45 @@ static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on,
 	}
 }
 
-#ifdef CONFIG_MACH_SUN8I_R40
-/* secondary core entry address is programmed differently on R40 */
 static void __secure sunxi_set_entry_address(void *entry)
 {
-	writel((u32)entry,
-	       SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0);
-}
-#else
-static void __secure sunxi_set_entry_address(void *entry)
-{
-	struct sunxi_cpucfg_reg *cpucfg =
-		(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
+	/* secondary core entry address is programmed differently on R40 */
+	if (IS_ENABLED(CONFIG_MACH_SUN8I_R40)) {
+		writel((u32)entry,
+		       SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0);
+	} else {
+		struct sunxi_cpucfg_reg *cpucfg =
+			(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
 
-	writel((u32)entry, &cpucfg->priv0);
+		writel((u32)entry, &cpucfg->priv0);
+	}
 }
-#endif
 
-#ifdef CONFIG_MACH_SUN7I
-/* sun7i (A20) is different from other single cluster SoCs */
-static void __secure sunxi_cpu_set_power(int __always_unused cpu, bool on)
-{
-	struct sunxi_cpucfg_reg *cpucfg =
-		(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
-
-	sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
-			   on, 0);
-}
-#elif defined CONFIG_MACH_SUN8I_R40
 static void __secure sunxi_cpu_set_power(int cpu, bool on)
 {
 	struct sunxi_cpucfg_reg *cpucfg =
 		(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
 
-	sunxi_power_switch((void *)cpucfg + SUN8I_R40_PWR_CLAMP(cpu),
-			   (void *)cpucfg + SUN8I_R40_PWROFF,
-			   on, cpu);
-}
-#else /* ! CONFIG_MACH_SUN7I && ! CONFIG_MACH_SUN8I_R40 */
-static void __secure sunxi_cpu_set_power(int cpu, bool on)
-{
-	struct sunxi_prcm_reg *prcm =
-		(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+	/* sun7i (A20) is different from other single cluster SoCs */
+	if (IS_ENABLED(CONFIG_MACH_SUN7I)) {
+		sunxi_power_switch(NULL, &cpucfg->cpu1_pwroff, on, 0);
+	} else if (IS_ENABLED(CONFIG_MACH_SUN8I_R40)) {
+		sunxi_power_switch(NULL, (void *)cpucfg + SUN8I_R40_PWROFF,
+				   on, cpu);
+	} else {
+#if !defined(CONFIG_SUN50I_GEN_H6) && !defined(CONFIG_SUNXI_GEN_NCAT2)
+		struct sunxi_prcm_reg *prcm =
+			(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
 
-	sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff,
-			   on, cpu);
+		u32 *clamp = &prcm->cpu_pwr_clamp[cpu];
+		if (IS_ENABLED(CONFIG_MACH_SUN6I) ||
+		    IS_ENABLED(CONFIG_MACH_SUN8I_H3))
+			clamp = NULL;
+
+		sunxi_power_switch(clamp, &prcm->cpu_pwroff, on, cpu);
+#endif
+	}
 }
-#endif /* CONFIG_MACH_SUN7I */
 
 void __secure sunxi_cpu_power_off(u32 cpuid)
 {
-- 
2.39.2


  parent reply	other threads:[~2023-06-01 21:49 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-01 21:48 [RFC PATCH 0/4] Allwinner R528/T113s PSCI Sam Edwards
2023-06-01 21:48 ` [RFC PATCH 1/4] SQUASH ME Sam Edwards
2023-06-01 21:48 ` Sam Edwards [this message]
2023-06-01 21:48 ` [RFC PATCH 3/4] sunxi: psci: refactor register access to separate functions Sam Edwards
2023-06-01 21:48 ` [RFC PATCH 4/4] sunxi: psci: implement PSCI on R528 Sam Edwards
2023-06-02 20:53   ` Maksim Kiselev

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