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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Shesha Bhushan Sreenivasamurthy <sheshas@marvell.com>
Cc: "linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>
Subject: Re: [EXT] Re: I2C Multi-master and Controller Slave Mode in QEMU
Date: Fri, 2 Jun 2023 13:25:17 +0100	[thread overview]
Message-ID: <20230602132517.00006793@Huawei.com> (raw)
In-Reply-To: <DM6PR18MB2844DA254DE3754A3E07AC92AF49A@DM6PR18MB2844.namprd18.prod.outlook.com>

On Thu, 1 Jun 2023 23:07:54 +0000
Shesha Bhushan Sreenivasamurthy <sheshas@marvell.com> wrote:

> Thanks a lot. It works. I am planning to add more CXL commands, especially DCD commands. Are you or any one working ? If so I will wait :)

It's on my todo list, but I'm more than happy if you do it instead.

I'll get on with something else:
I want to get the mailbox based tunneling working so that we have that
path for MHDs as well which is reasonable separate at this stage anyway
- later on we'll want to factor out some common solutions - I suspect
a lot of the actual command responses will be done in hw/mem/cxl_type3.c
and hw/pci-bridge/cxl_upstream.c, but for now it's convenient
to keep them separate.  The switch CCI stuff needs to be in the mix as well
and will likely look a bit like how the mctp CCI hooks into the switch USP.
The old prototype of that didn't talk to the devices at all so was returning
made up responses.

Jonathan



> 
> 
> From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
> Sent: Thursday, May 25, 2023 9:23 AM
> To: Shesha Bhushan Sreenivasamurthy <sheshas@marvell.com>
> Cc: linux-cxl@vger.kernel.org <linux-cxl@vger.kernel.org>
> Subject: Re: [EXT] Re: I2C Multi-master and Controller Slave Mode in QEMU 
>  
> 
> > ss: Thats great ! Can you please share the code, both QEMU and kernel driver ?  
> 
> QEMU:  https://urldefense.proofpoint.com/v2/url?u=http-3A__gitlab.com_jic23_qemu&d=DwICAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=Zta64bwn4nurTRpD4LY2OGr8KklkMRPn7Z_Qy0o4unU&m=UQ3dgvJg_i34v2qxPCBlB3FuVUmLQ37oHw2LKVGYimsevbBm75NKu_2xDhtZ3LxL&s=DWzpkbi44uasdoDv_GxAR2to07vEd_Cr7eaKz0lpP6E&e=  cxl-2023-05-25 
> https://urldefense.proofpoint.com/v2/url?u=https-3A__lore.kernel.org_linux-2Dcxl_20230525160859.32517-2D1-2DJonathan.Cameron-40huawei.com_T_-23t&d=DwICAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=Zta64bwn4nurTRpD4LY2OGr8KklkMRPn7Z_Qy0o4unU&m=UQ3dgvJg_i34v2qxPCBlB3FuVUmLQ37oHw2LKVGYimsevbBm75NKu_2xDhtZ3LxL&s=3zV1e3KB_3wAesmu5jsYP7YodFFgzjydMl0vICy6Tis&e= 
> Kernel:  To enable ACPI support in the aspeed-i2c driver used.
> https://urldefense.proofpoint.com/v2/url?u=https-3A__lore.kernel.org_linux-2Dcxl_20230525152203.32190-2D1-2DJonathan.Cameron-40huawei.com_T_-23t&d=DwICAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=Zta64bwn4nurTRpD4LY2OGr8KklkMRPn7Z_Qy0o4unU&m=UQ3dgvJg_i34v2qxPCBlB3FuVUmLQ37oHw2LKVGYimsevbBm75NKu_2xDhtZ3LxL&s=tPmsOiZy9jqzAIFK46Nj_WIzpX7WNf5bxge2uZUa2Yg&e= 
> 
> Other than enabling MCTP + the aspeed-i2c driver, not much special needed kernel side
> (all access is from the MCTP socket interface in userspace).
> 
> Have fun.  It's pretty minimal at the moment.
> For switches it pokes at the number of ports (the port status is all lies for now)
> For Type 3 devices it just provide Identify.
> 
> I need to do a little more spec diving to check I've enabled them for the correct
> MCTP bindings.
> 
> Jonathan

  reply	other threads:[~2023-06-02 12:25 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-19 19:43 I2C Multi-master and Controller Slave Mode in QEMU Shesha Bhushan Sreenivasamurthy
2023-05-22 14:41 ` Jonathan Cameron
2023-05-23 22:08   ` [EXT] " Shesha Bhushan Sreenivasamurthy
2023-05-24 16:39     ` Jonathan Cameron
2023-05-24 17:48       ` Shesha Bhushan Sreenivasamurthy
2023-05-25 16:23         ` Jonathan Cameron
2023-06-01 23:07           ` Shesha Bhushan Sreenivasamurthy
2023-06-02 12:25             ` Jonathan Cameron [this message]
2023-06-02 23:58               ` Shesha Bhushan Sreenivasamurthy

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