From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99C4EC77B7A for ; Tue, 13 Jun 2023 07:05:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=nHUYFV4H0YaKNrjPudMdDVUpnaGUvTGiRpaDzn6Hc1U=; b=rX4u7c14TGxrhK k7Doc/1cSLLzKIWYCua7xq3ijwwi49S05aLrgQpkdEx2Ip3fGABeK2L5YMnIeYlXbIFjEtjDSaOCV P5NQObr/3GoK6ap3tphLxSaHb5qyOxsMBpbHZdMk+ZEPMmWwUwC6qDEUdgyv2oqsEXJHxvlh+oYEO Efrne0YPWXuWR+N50UBdYeVaV9s8Nq58eBywasXScEbQQ5Cp5sYc6ZKUnDa02AU8OVr1ANwNKB963 vJ+LVkHzFwhMY9dJaDamW+lmdppjl8u3Q52liUR515+FsWZmRy2vW0rgiQyF//+6Irq+gggOQgnw9 DwfDwa7ukFwcjSLLD1LA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q8y5T-0079ou-03; Tue, 13 Jun 2023 07:05:07 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q8y5N-0079ns-2S for linux-arm-kernel@lists.infradead.org; Tue, 13 Jun 2023 07:05:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686639902; x=1718175902; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=2AtW6y3EN8O+q/fnZWh+rQwVGxKOSUVLNaK9VlQDLHg=; b=oQLAp3WPjQ5p4lDce0JORTvYV6owJ/uI7cbQLJJL+nJ05kdeNfCtRg+g +p8g9uNY0MXQhBCB/vbRZ077IMqHppQJLB7H+9k1aaXhhlFsSVmVtSi8s W1IWMI8bno/L1xtSvufSbA0vYfIHCrxY1OMjiaKitpXmHiQ/nwuycljy+ QeM8GQxPztfnytM9rWZrXLMfMbXomjD/AwBgPIw+2UuFRnp1bPIEU5eOZ Qr8ApzFWVWC9ZvYOgGj9zCCAZgkqx6fqPLxNb5gfagiFwzMu9RoSw4gHq 5bPTV6QlphfXSH8o/h68tdA3lpYymxTf5gmMtIeHITQovFNaUmf44wdX2 Q==; X-IronPort-AV: E=Sophos;i="6.00,238,1681196400"; d="scan'208";a="215783313" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jun 2023 00:04:56 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 13 Jun 2023 00:04:55 -0700 Received: from che-lt-i67131.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 13 Jun 2023 00:04:47 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: , , , , , , , Manikandan Subject: [PATCH 0/9] Add support for XLCDC to sam9x7 SoC family. Date: Tue, 13 Jun 2023 12:34:17 +0530 Message-ID: <20230613070426.467389-1-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230613_000502_055630_D4F35B54 X-CRM114-Status: UNSURE ( 8.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Manikandan This patch series aims to add support for XLCDC IP of sam9x7 SoC family to the DRM subsystem.XLCDC IP has additional registers and new configuration bits compared to the existing register set of HLCDC IP. The compatible string "microchip,sam9x7-xlcdc", defined for sam9x7 SoC family helps to differentiate the XLCDC and existing HLCDC code within the same driver. Durai Manickam KR (2): drm: atmel-hlcdc: Define SAM9X7 XLCDC specific registers drm: atmel-hlcdc: add compatible string check for XLCDC and HLCDC Manikandan Muralidharan (7): dt-bindings: mfd: Add bindings for SAM9X7 LCD controller mfd: atmel-hlcdc: Add compatible for SAM9X7 HLCD controller drm: atmel-hlcdc: add LCD controller layer definition for SAM9X7 drm: atmel_hlcdc: Add support for XLCDC in atmel LCD driver drm: atmel-hlcdc: add DPI mode support for XLCDC drm: atmel-hlcdc: add vertical and horizontal scaling support for XLCDC drm: atmel-hlcdc: add support for DSI output formats .../devicetree/bindings/mfd/atmel-hlcdc.txt | 1 + .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 167 ++++++++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 105 ++++++ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 113 +++++++ .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 315 ++++++++++++++---- drivers/mfd/atmel-hlcdc.c | 1 + include/linux/mfd/atmel-hlcdc.h | 10 + 7 files changed, 609 insertions(+), 103 deletions(-) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E803C77B7A for ; Tue, 13 Jun 2023 07:05:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240163AbjFMHFC (ORCPT ); Tue, 13 Jun 2023 03:05:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240487AbjFMHFA (ORCPT ); Tue, 13 Jun 2023 03:05:00 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C107810F9; Tue, 13 Jun 2023 00:04:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686639897; x=1718175897; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=2AtW6y3EN8O+q/fnZWh+rQwVGxKOSUVLNaK9VlQDLHg=; b=kSwpxEXu/LxluCk0Nws7fDAtOsvy5vsbQ/TW0/tZzsflN1GD0NLLNrAR r+kQN+m5pGFkpW5d7lfHKphJ7TAzbgqz7p5cHnvtJs4Fgv5nXdmFBBnbM XdP9hZVdkdmmoZuQ/7oURboFbKaECyWn5urC00q9CvzpK8e2xMTlAFsP6 YK/LKznNnat+S+LnJgLte32uIDaXFrVxYIpk2BuJyTyo6RqHs8nSAFdaz D/UT7jwiKYLUVeWL7ssipFJrpsfqKt2pKD5g1NqKkAR/bYxmwKUY2Bazv ZXmD5cC0xode2Fix1zyeiLUaYFSRQHkQg6m62EL6sW+pw/Qi3VV7BXByP w==; X-IronPort-AV: E=Sophos;i="6.00,238,1681196400"; d="scan'208";a="215783313" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jun 2023 00:04:56 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 13 Jun 2023 00:04:55 -0700 Received: from che-lt-i67131.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 13 Jun 2023 00:04:47 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: , , , , , , , Manikandan Subject: [PATCH 0/9] Add support for XLCDC to sam9x7 SoC family. Date: Tue, 13 Jun 2023 12:34:17 +0530 Message-ID: <20230613070426.467389-1-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Manikandan This patch series aims to add support for XLCDC IP of sam9x7 SoC family to the DRM subsystem.XLCDC IP has additional registers and new configuration bits compared to the existing register set of HLCDC IP. The compatible string "microchip,sam9x7-xlcdc", defined for sam9x7 SoC family helps to differentiate the XLCDC and existing HLCDC code within the same driver. Durai Manickam KR (2): drm: atmel-hlcdc: Define SAM9X7 XLCDC specific registers drm: atmel-hlcdc: add compatible string check for XLCDC and HLCDC Manikandan Muralidharan (7): dt-bindings: mfd: Add bindings for SAM9X7 LCD controller mfd: atmel-hlcdc: Add compatible for SAM9X7 HLCD controller drm: atmel-hlcdc: add LCD controller layer definition for SAM9X7 drm: atmel_hlcdc: Add support for XLCDC in atmel LCD driver drm: atmel-hlcdc: add DPI mode support for XLCDC drm: atmel-hlcdc: add vertical and horizontal scaling support for XLCDC drm: atmel-hlcdc: add support for DSI output formats .../devicetree/bindings/mfd/atmel-hlcdc.txt | 1 + .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 167 ++++++++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 105 ++++++ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 113 +++++++ .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 315 ++++++++++++++---- drivers/mfd/atmel-hlcdc.c | 1 + include/linux/mfd/atmel-hlcdc.h | 10 + 7 files changed, 609 insertions(+), 103 deletions(-) -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A8066C77B7A for ; Tue, 13 Jun 2023 07:12:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D5F8E10E32A; Tue, 13 Jun 2023 07:12:09 +0000 (UTC) X-Greylist: delayed 427 seconds by postgrey-1.36 at gabe; Tue, 13 Jun 2023 07:12:07 UTC Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by gabe.freedesktop.org (Postfix) with ESMTPS id A47DE10E32A for ; Tue, 13 Jun 2023 07:12:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686640328; x=1718176328; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=2AtW6y3EN8O+q/fnZWh+rQwVGxKOSUVLNaK9VlQDLHg=; b=th2NFI9H4icdK4f/C0TJQQ3KjQJsmARMwuju7A0pz7DswrNxlfmb1mJr OGKPItdX5kwj2Xas5k+a25g6ijXHpRrCON0t/WvGSDsdboaOGnN8IeSEF AXq/pUQoKOV4kUQi8Hot5mhzU4CzcZRur0dE+v/WHN18ddi0Mi6GiApvk 9SDB3YXLeAfEhndvXZ4K8OAcuYPV1fgylNb8XpIbEPW94WMBc+ZIzHnD8 2i3VZx9//qQiUY/6s+3u4NAPMWzwrCxkC/VD30DulMZLhUdw+l3Vp9wvx VuXO1qIrAOxPra0lavNE0HjWXpeFfWJasJQApCyv2BBwAnN2r9yqGLApP w==; X-IronPort-AV: E=Sophos;i="6.00,238,1681196400"; d="scan'208";a="215783313" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jun 2023 00:04:56 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 13 Jun 2023 00:04:55 -0700 Received: from che-lt-i67131.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 13 Jun 2023 00:04:47 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , Subject: [PATCH 0/9] Add support for XLCDC to sam9x7 SoC family. Date: Tue, 13 Jun 2023 12:34:17 +0530 Message-ID: <20230613070426.467389-1-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Balakrishnan.S@microchip.com, Nayabbasha.Sayed@microchip.com, Balamanikandan.Gunasundar@microchip.com, Manikandan , Varshini.Rajendran@microchip.com, Dharma.B@microchip.com, Durai.ManickamKR@microchip.com, Hari.PrasathGE@microchip.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Manikandan This patch series aims to add support for XLCDC IP of sam9x7 SoC family to the DRM subsystem.XLCDC IP has additional registers and new configuration bits compared to the existing register set of HLCDC IP. The compatible string "microchip,sam9x7-xlcdc", defined for sam9x7 SoC family helps to differentiate the XLCDC and existing HLCDC code within the same driver. Durai Manickam KR (2): drm: atmel-hlcdc: Define SAM9X7 XLCDC specific registers drm: atmel-hlcdc: add compatible string check for XLCDC and HLCDC Manikandan Muralidharan (7): dt-bindings: mfd: Add bindings for SAM9X7 LCD controller mfd: atmel-hlcdc: Add compatible for SAM9X7 HLCD controller drm: atmel-hlcdc: add LCD controller layer definition for SAM9X7 drm: atmel_hlcdc: Add support for XLCDC in atmel LCD driver drm: atmel-hlcdc: add DPI mode support for XLCDC drm: atmel-hlcdc: add vertical and horizontal scaling support for XLCDC drm: atmel-hlcdc: add support for DSI output formats .../devicetree/bindings/mfd/atmel-hlcdc.txt | 1 + .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 167 ++++++++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 105 ++++++ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 113 +++++++ .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 315 ++++++++++++++---- drivers/mfd/atmel-hlcdc.c | 1 + include/linux/mfd/atmel-hlcdc.h | 10 + 7 files changed, 609 insertions(+), 103 deletions(-) -- 2.25.1