From: Andre Przywara <andre.przywara@arm.com>
To: Chris Morgan <macroalpha82@gmail.com>
Cc: linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org,
mripard@kernel.org, uwu@icenowy.me, samuel@sholland.org,
jernej.skrabec@gmail.com, wens@csie.org, conor+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org,
Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH 1/3] arm: dts: sun8i: V3s: Add pinctrl for pwm
Date: Wed, 21 Jun 2023 00:50:00 +0100 [thread overview]
Message-ID: <20230621005000.558b660c@slackpad.lan> (raw)
In-Reply-To: <20230620200022.295674-2-macroalpha82@gmail.com>
On Tue, 20 Jun 2023 15:00:20 -0500
Chris Morgan <macroalpha82@gmail.com> wrote:
Hi Chris,
thanks for taking care of upstreaming, cute little device.
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add a default pinctrl for the pwm function.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> arch/arm/boot/dts/sun8i-v3s.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
> index b001251644f7..e5977524abe2 100644
> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> @@ -414,6 +414,11 @@ mmc1_pins: mmc1-pins {
> bias-pull-up;
> };
>
> + pwm_pins: pwm-pins {
> + pins = "PB4";
> + function = "pwm0";
> + };
> +
> spi0_pins: spi0-pins {
> pins = "PC0", "PC1", "PC2", "PC3";
> function = "spi0";
> @@ -441,6 +446,8 @@ pwm: pwm@1c21400 {
> "allwinner,sun7i-a20-pwm";
> reg = <0x01c21400 0xc>;
> clocks = <&osc24M>;
> + pinctrl-0 = <&pwm_pins>;
> + pinctrl-names = "default";
How is this supposed to work with multiple channels? There is PWM1 on
PB5. If one wants to potentially use that, we would need to add a
reference to those pins here as well, and they would all be muxed to
PWM upon the PWM controller probing?
So while I see that it's the only output pin for PWM0, this might still
need to go into the board .dts, alongside the status = "okay"; line. So
each board would specify exactly the pins it needs (PWM0 only, PWM1
only, both or none).
Otherwise I compared this against the manual and Linux pinctrl driver,
it all matches up.
Cheers,
Andre
> #pwm-cells = <3>;
> status = "disabled";
> };
next prev parent reply other threads:[~2023-06-20 23:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 20:00 [PATCH 0/3] Add Anbernic RG-Nano Chris Morgan
2023-06-20 20:00 ` [PATCH 1/3] arm: dts: sun8i: V3s: Add pinctrl for pwm Chris Morgan
2023-06-20 23:50 ` Andre Przywara [this message]
2023-06-24 4:57 ` Icenowy Zheng
2023-06-26 8:50 ` Andre Przywara
2023-06-27 17:49 ` Chris Morgan
2023-06-20 20:00 ` [PATCH 2/3] dt-binding: arm: sunxi: add Anbernic RG-Nano Chris Morgan
2023-06-21 6:15 ` Krzysztof Kozlowski
2023-06-21 9:55 ` Andre Przywara
2023-06-20 20:00 ` [PATCH 3/3] ARM: dts: sunxi: add support for " Chris Morgan
2023-06-21 9:52 ` Andre Przywara
2023-06-27 17:49 ` Chris Morgan
2023-06-29 19:34 ` Andre Przywara
2023-06-29 22:21 ` Chris Morgan
2023-06-30 8:16 ` Maxime Ripard
2023-06-30 13:34 ` Chris Morgan
2023-07-01 0:37 ` Andre Przywara
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