From: Bjorn Helgaas <helgaas@kernel.org>
To: Sricharan Ramabadhran <quic_srichara@quicinc.com>,
Manivannan Sadhasivam <mani@kernel.org>
Cc: agross@kernel.org, andersson@kernel.org,
konrad.dybcio@linaro.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
sboyd@kernel.org, mturquette@baylibre.com, mani@kernel.org,
lpieralisi@kernel.org, bhelgaas@google.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/4] pcie: qcom: Fix the macro PARF_SLV_ADDR_SPACE_SIZE_2_3_3
Date: Fri, 23 Jun 2023 12:42:21 -0500 [thread overview]
Message-ID: <20230623174221.GA180338@bhelgaas> (raw)
In-Reply-To: <20230623093445.3977772-2-quic_srichara@quicinc.com>
On Fri, Jun 23, 2023 at 03:04:42PM +0530, Sricharan Ramabadhran wrote:
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro used for IPQ8074
> pcie slave addr size was initially set to 0x358, but
> was wrongly changed to 0x168 as a part of
> 'PCI: qcom: Sort and group registers and bitfield definitions'
> Fixing it back to right value here.
>
> Without this pcie bring up on IPQ8074 is broken now.
>
> Fixes: 769e49d87b15 ("PCI: qcom: Sort and group registers and bitfield definitions")
769e49d87b15 appeared in v6.4-rc1, so ideally this would get merged
before v6.4 releases on Monday. I can try to do that, given an ack
from Manivannan.
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 4ab30892f6ef..59823beed13f 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -43,7 +43,7 @@
> #define PARF_PHY_REFCLK 0x4c
> #define PARF_CONFIG_BITS 0x50
> #define PARF_DBI_BASE_ADDR 0x168
> -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
> +#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x358 /* Register offset specific to IP ver 2.3.3 */
> #define PARF_MHI_CLOCK_RESET_CTRL 0x174
> #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
> #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
> --
> 2.34.1
>
next prev parent reply other threads:[~2023-06-23 17:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-23 9:34 [PATCH 0/4] IPQ8074 pcie/wcss fixes Sricharan Ramabadhran
2023-06-23 9:34 ` [PATCH 1/4] pcie: qcom: Fix the macro PARF_SLV_ADDR_SPACE_SIZE_2_3_3 Sricharan Ramabadhran
2023-06-23 17:42 ` Bjorn Helgaas [this message]
2023-06-23 18:00 ` Bjorn Helgaas
2023-06-30 5:22 ` Sricharan Ramabadhran
2023-06-24 6:32 ` Manivannan Sadhasivam
2023-06-30 5:24 ` Sricharan Ramabadhran
2023-06-23 9:34 ` [PATCH 2/4] dt-bindings: clock: qcom: Add reset for WCSSAON Sricharan Ramabadhran
2023-06-23 9:34 ` [PATCH 3/4] clk: qcom: Add WCSSAON reset Sricharan Ramabadhran
2023-06-24 6:34 ` [PATCH 0/4] IPQ8074 pcie/wcss fixes Manivannan Sadhasivam
2023-06-30 5:23 ` Sricharan Ramabadhran
-- strict thread matches above, loose matches on Subject: below --
2023-06-23 9:43 Sricharan Ramabadhran
2023-06-23 9:44 ` [PATCH 1/4] pcie: qcom: Fix the macro PARF_SLV_ADDR_SPACE_SIZE_2_3_3 Sricharan Ramabadhran
2023-06-23 10:22 ` Konrad Dybcio
2023-06-23 10:41 ` Sricharan Ramabadhran
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