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Tue, 27 Jun 2023 04:51:45 -0700 (PDT) Received: from m1x-phil.lan ([176.187.199.204]) by smtp.gmail.com with ESMTPSA id h14-20020a17090634ce00b0098238141deasm4478624ejb.90.2023.06.27.04.51.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 27 Jun 2023 04:51:45 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, Paolo Bonzini , Greg Kurz , kvm@vger.kernel.org, Nicholas Piggin , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 3/6] target/ppc: Move CPU QOM definitions to cpu-qom.h Date: Tue, 27 Jun 2023 13:51:21 +0200 Message-Id: <20230627115124.19632-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230627115124.19632-1-philmd@linaro.org> References: <20230627115124.19632-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/cpu-qom.h | 5 +++++ target/ppc/cpu.h | 6 ------ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 9666f54f65..c2bff349cc 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -31,6 +31,11 @@ OBJECT_DECLARE_CPU_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU) +#define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU +#define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU +#define cpu_list ppc_cpu_list + ObjectClass *ppc_cpu_class_by_name(const char *name); typedef struct CPUArchState CPUPPCState; diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index af12c93ebc..e91e1774e5 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1468,12 +1468,6 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) int ppc_dcr_read(ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write(ppc_dcr_t *dcr_env, int dcrn, uint32_t val); -#define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU -#define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX -#define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU - -#define cpu_list ppc_cpu_list - /* MMU modes definitions */ #define MMU_USER_IDX 0 static inline int cpu_mmu_index(CPUPPCState *env, bool ifetch) -- 2.38.1