From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7AC1317C4 for ; Mon, 10 Jul 2023 04:40:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688964015; x=1720500015; h=date:from:to:cc:subject:message-id:mime-version; bh=QH/UCvFvZDF/cjuZGjA8BQNFdi+Bj2UqvbkXpI9n1vg=; b=GqnKNQoOyaJgFEC0wnh+iIvAG3prKw32N5Ie+OK4VB6DUTzUKX+ilsfl E1Eys58/o4Vtc3rODQ2Rho1zQzzG6cCfYe+oK7yc4X5ojPRE2j3P5uI0J yXBOxwsCBzW+0qeRhepGOtyzE2TwPK/LPhvvNjcrHGhNlP52K35QoO8Br X0+W7pLI8mcBKqK1/u7VUjzrFDuAdbVO+9S2tJ/bWgIlY6TaPuICqtby+ Bzf5djVUWh0+ss0U+45dyowVda2FjNtosXerJhaNrtDJen/5EjpwmAYlX 4cGdghHnZgo3vutBxcCUP/OUXg0UjtBoBgiQ+mnrBaqSZ3H8MaHhw3hi4 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10766"; a="354112395" X-IronPort-AV: E=Sophos;i="6.01,194,1684825200"; d="scan'208";a="354112395" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jul 2023 21:40:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10766"; a="755864398" X-IronPort-AV: E=Sophos;i="6.01,194,1684825200"; d="scan'208";a="755864398" Received: from lkp-server01.sh.intel.com (HELO c544d7fc5005) ([10.239.97.150]) by orsmga001.jf.intel.com with ESMTP; 09 Jul 2023 21:40:07 -0700 Received: from kbuild by c544d7fc5005 with local (Exim 4.96) (envelope-from ) id 1qIigw-0003XG-17; Mon, 10 Jul 2023 04:40:06 +0000 Date: Mon, 10 Jul 2023 12:39:10 +0800 From: kernel test robot To: oe-kbuild@lists.linux.dev Cc: lkp@intel.com, Dan Carpenter Subject: drivers/clk/ingenic/jz4760-cgu.c:80 jz4760_cgu_calc_m_n_od() error: uninitialized symbol 'od'. Message-ID: <202307101213.PJCNH4wW-lkp@intel.com> Precedence: bulk X-Mailing-List: oe-kbuild@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline BCC: lkp@intel.com CC: oe-kbuild-all@lists.linux.dev CC: linux-kernel@vger.kernel.org TO: Paul Cercueil CC: Stephen Boyd tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5 commit: ecfb9f404771dde909ce7743df954370933c3be2 clk: ingenic: jz4760: Update M/N/OD calculation algorithm date: 6 months ago :::::: branch date: 8 hours ago :::::: commit date: 6 months ago config: mips-randconfig-m031-20230710 (https://download.01.org/0day-ci/archive/20230710/202307101213.PJCNH4wW-lkp@intel.com/config) compiler: mips64el-linux-gcc (GCC) 12.3.0 reproduce: (https://download.01.org/0day-ci/archive/20230710/202307101213.PJCNH4wW-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Reported-by: Dan Carpenter | Closes: https://lore.kernel.org/r/202307101213.PJCNH4wW-lkp@intel.com/ smatch warnings: drivers/clk/ingenic/jz4760-cgu.c:80 jz4760_cgu_calc_m_n_od() error: uninitialized symbol 'od'. vim +/od +80 drivers/clk/ingenic/jz4760-cgu.c bdbfc029374f6d Paul Cercueil 2021-05-30 55 bdbfc029374f6d Paul Cercueil 2021-05-30 56 static void bdbfc029374f6d Paul Cercueil 2021-05-30 57 jz4760_cgu_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, bdbfc029374f6d Paul Cercueil 2021-05-30 58 unsigned long rate, unsigned long parent_rate, bdbfc029374f6d Paul Cercueil 2021-05-30 59 unsigned int *pm, unsigned int *pn, unsigned int *pod) bdbfc029374f6d Paul Cercueil 2021-05-30 60 { ecfb9f404771dd Paul Cercueil 2022-12-14 61 unsigned int m, n, od, m_max = (1 << pll_info->m_bits) - 1; bdbfc029374f6d Paul Cercueil 2021-05-30 62 bdbfc029374f6d Paul Cercueil 2021-05-30 63 /* The frequency after the N divider must be between 1 and 50 MHz. */ bdbfc029374f6d Paul Cercueil 2021-05-30 64 n = parent_rate / (1 * MHZ); bdbfc029374f6d Paul Cercueil 2021-05-30 65 bdbfc029374f6d Paul Cercueil 2021-05-30 66 /* The N divider must be >= 2. */ bdbfc029374f6d Paul Cercueil 2021-05-30 67 n = clamp_val(n, 2, 1 << pll_info->n_bits); bdbfc029374f6d Paul Cercueil 2021-05-30 68 ecfb9f404771dd Paul Cercueil 2022-12-14 69 rate /= MHZ; ecfb9f404771dd Paul Cercueil 2022-12-14 70 parent_rate /= MHZ; bdbfc029374f6d Paul Cercueil 2021-05-30 71 ecfb9f404771dd Paul Cercueil 2022-12-14 72 for (m = m_max; m >= m_max && n >= 2; n--) { ecfb9f404771dd Paul Cercueil 2022-12-14 73 m = rate * n / parent_rate; ecfb9f404771dd Paul Cercueil 2022-12-14 74 od = m & 1; ecfb9f404771dd Paul Cercueil 2022-12-14 75 m <<= od; bdbfc029374f6d Paul Cercueil 2021-05-30 76 } bdbfc029374f6d Paul Cercueil 2021-05-30 77 bdbfc029374f6d Paul Cercueil 2021-05-30 78 *pm = m; ecfb9f404771dd Paul Cercueil 2022-12-14 79 *pn = n + 1; bdbfc029374f6d Paul Cercueil 2021-05-30 @80 *pod = 1 << od; bdbfc029374f6d Paul Cercueil 2021-05-30 81 } bdbfc029374f6d Paul Cercueil 2021-05-30 82 :::::: The code at line 80 was first introduced by commit :::::: bdbfc029374f6d9ed31bc44983501fd1008b677f clk: ingenic: Add support for the JZ4760 :::::: TO: Paul Cercueil :::::: CC: Stephen Boyd -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki