From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A119C8D8 for ; Tue, 18 Jul 2023 10:04:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 49198C433C8; Tue, 18 Jul 2023 10:04:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1689674666; bh=9HH4kTQ98mOmfmk0yY7rNImccRI+W5P4UqFEPSZVV+E=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=VUNa+MHEP8kN+Jbkz9qEImYZfvvRiItufnkud87Y7kCZczsdQfodaFaPh+Dukm72h DxhBsnqDzgX8e99gPyeSARMyfoV/PyJ1W5hkisd11jSmeyKWMHjopJstVT7lTrIVAV l7ioLo0zO6E1uHDZCo8OFR4q2b/VSQrbUQ6WvnurW6TmsjZGWHijxg9zOnq9LUB5b1 tvx6y8hTzzeTu2xh89bhDeSSbgq2S99eOBuCZf842dgD075G5YlS6KdcjjJNVfhoJF gO4ftTWuSdCHogV+aAqGWROKE8Czd9lvQ1HERt3u4OP97qZkgTodR65KrPM1g+9gra MfpcymC03zTDQ== Date: Tue, 18 Jul 2023 15:34:00 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: Manivannan Sadhasivam , helgaas@kernel.org, imx@lists.linux.dev, bhelgaas@google.com, devicetree@vger.kernel.org, gustavo.pimentel@synopsys.com, kw@linux.com, leoyang.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lorenzo.pieralisi@arm.com, minghuan.lian@nxp.com, mingkai.hu@nxp.com, robh+dt@kernel.org, roy.zang@nxp.com, shawnguo@kernel.org, zhiqiang.hou@nxp.com Subject: Re: [PATCH v3 1/2] PCI: dwc: Implement general suspend/resume functionality for L2/L3 transitions Message-ID: <20230718100400.GB4771@thinkpad> References: <20230419164118.596300-1-Frank.Li@nxp.com> <20230717164526.GC35455@thinkpad> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Mon, Jul 17, 2023 at 02:36:19PM -0400, Frank Li wrote: > On Mon, Jul 17, 2023 at 10:15:26PM +0530, Manivannan Sadhasivam wrote: > > On Wed, Apr 19, 2023 at 12:41:17PM -0400, Frank Li wrote: > > > Introduced helper function dw_pcie_get_ltssm to retrieve SMLH_LTSS_STATE. > > > Added API pme_turn_off and exit_from_l2 for managing L2/L3 state transitions. > > > > > > Typical L2 entry workflow: > > > > > > 1. Transmit PME turn off signal to PCI devices. > > > 2. Await link entering L2_IDLE state. > > > > AFAIK, typical workflow is to wait for PME_To_Ack. > > 1 Already wait for PME_to_ACK, 2, just wait for link actual enter L2. > I think PCI RC needs some time to set link enter L2 after get ACK from > PME. > > > > > > 3. Transition Root complex to D3 state. > > > > > > Typical L2 exit workflow: > > > > > > 1. Transition Root complex to D0 state. > > > 2. Issue exit from L2 command. > > > 3. Reinitialize PCI host. > > > 4. Wait for link to become active. > > > > > > Signed-off-by: Frank Li > > > --- > > > Change from v2 to v3: > > > - Basic rewrite whole patch according rob herry suggestion. > > > put common function into dwc, so more soc can share the same logic. > > > > > > .../pci/controller/dwc/pcie-designware-host.c | 80 +++++++++++++++++++ > > > drivers/pci/controller/dwc/pcie-designware.h | 28 +++++++ > > > 2 files changed, 108 insertions(+) > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > > > index 9952057c8819..ef6869488bde 100644 > > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > > > @@ -8,6 +8,7 @@ > > > * Author: Jingoo Han > > > */ > > > > > > +#include > > > #include > > > #include > > > #include > > > @@ -807,3 +808,82 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp) > > > return 0; > > > } > > > EXPORT_SYMBOL_GPL(dw_pcie_setup_rc); > > > + > > > +/* > > > + * There are for configuring host controllers, which are bridges *to* PCI devices > > > + * but are not PCI devices themselves. > > > > None of the functions applicable to the devices. So there is no need for this > > comment. > > I copy comments in drivers/pci/controller/dwc/pcie-designware.c. > > /* > * These interfaces resemble the pci_find_*capability() interfaces, but these > * are for configuring host controllers, which are bridges *to* PCI devices but > * are not PCI devices themselves. > */ > static u8 __dw_pcie_find_next_cap(struct dw_pcie *pci, u8 cap_ptr, > u8 cap) > > > I think it is reasonalble because it is too similar with standard API > pci_set_power_state(); > Ok, then please add this API similarity in the comment as like __dw_pcie_find_next_cap(). Also change "There" to "These". > > > > > + */ > > > +static void dw_pcie_set_dstate(struct dw_pcie *pci, u32 dstate) > > > > Please use pci_power_t defines for dstates. > > Although dwc use the same define, it is difference things. > Sorry, what difference? Could you please clarify? > > > > > +{ > > > + u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_PM); > > > + u32 val; > > > + > > > + val = dw_pcie_readw_dbi(pci, offset + PCI_PM_CTRL); > > > > Please use PCI accessors for accessing spec compliant registers. > > According to comments in pcie-designware.c, it is difference concept > even though register define is the same as PCI spec. It was used to > control root bridges. > Ah, I got slightly confused. This is fine. > > > > > + val &= ~PCI_PM_CTRL_STATE_MASK; > > > + val |= dstate; > > > + dw_pcie_writew_dbi(pci, offset + PCI_PM_CTRL, val); > > > +} > > > + > > > +int dw_pcie_suspend_noirq(struct dw_pcie *pci) > > > +{ > > > + u32 val; > > > + int ret; > > > + > > > + if (dw_pcie_get_ltssm(pci) <= DW_PCIE_LTSSM_DETECT_ACT) > > > + return 0; > > > + > > > + pci->pp.ops->pme_turn_off(&pci->pp); > > > > You should first check for the existence of the callback before invoking. This > > applies to all callbacks in this patch. > > Yes, I will update. > > > > > > + > > > + /* > > > + * PCI Express Base Specification Rev 4.0 > > > + * 5.3.3.2.1 PME Synchronization > > > + * Recommand 1ms to 10ms timeout to check L2 ready > > > + */ > > > + ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, > > > + 100, 10000, false, pci); > > > > Is there no way to wait for PME_To_Ack TLP? > > > Suppose PME_turn_off should wait for ACK before return. Ok. I didn't see this behavior in the spec, hence curious. > Here, just make sure Link enter L2 status. Hardware need some time to put > link to L2 after get ACK from bus, even it is very short generally. > Fine then. But can we check for PM_LINKST_IN_L2 SII System Information Interface (SII) instead of LTSSM state? > > > > > + if (ret) { > > > + dev_err(pci->dev, "PCIe link enter L2 timeout! ltssm = 0x%x\n", val); > > > + return ret; > > > + } > > > + > > > + dw_pcie_set_dstate(pci, 0x3); > > > + > > > + pci->suspended = true; > > > + > > > + return ret; > > > +} > > > +EXPORT_SYMBOL_GPL(dw_pcie_suspend_noirq); > > > + > > > +int dw_pcie_resume_noirq(struct dw_pcie *pci) > > > +{ > > > + int ret; > > > + > > > + if (!pci->suspended) > > > + return 0; > > > + > > > + pci->suspended = false; > > > + > > > + dw_pcie_set_dstate(pci, 0x0); > > > + > > > + pci->pp.ops->exit_from_l2(&pci->pp); > > > + > > > + /* delay 10 ms to access EP */ > > > > Is this delay as part of the DWC spec? If so, please quote the section. > > > > > + mdelay(10); > > > + > > > + ret = pci->pp.ops->host_init(&pci->pp); > > > + if (ret) { > > > + dev_err(pci->dev, "ls_pcie_host_init failed! ret = 0x%x\n", ret); > > > > s/ls_pcie_host_init/Host init > > > > > + return ret; > > > + } > > > + > > > + dw_pcie_setup_rc(&pci->pp); > > > + > > > > Don't you need to configure iATU? > > > > > + ret = dw_pcie_wait_for_link(pci); > > > > Don't you need to start the link beforehand? > > Suppose need start link, it works at layerscape platform just because dwc > have not full power off. some state still kept. > It may work for your platform but not for all if the power gets removed. So please start the link manually. - Mani > > > > > + if (ret) { > > > + dev_err(pci->dev, "wait link up timeout! ret = 0x%x\n", ret); > > > > dw_pcie_wait_for_link() itself prints error message on failure. So no need to do > > the same here. > > Okay > > > > > - Mani > > > > > + return ret; > > > + } > > > + > > > + return ret; > > > +} > > > +EXPORT_SYMBOL_GPL(dw_pcie_resume_noirq); > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > > > index 79713ce075cc..effb07a506e4 100644 > > > --- a/drivers/pci/controller/dwc/pcie-designware.h > > > +++ b/drivers/pci/controller/dwc/pcie-designware.h > > > @@ -288,10 +288,21 @@ enum dw_pcie_core_rst { > > > DW_PCIE_NUM_CORE_RSTS > > > }; > > > > > > +enum dw_pcie_ltssm { > > > + DW_PCIE_LTSSM_UNKNOWN = 0xFFFFFFFF, > > > + /* Need align PCIE_PORT_DEBUG0 bit0:5 */ > > > + DW_PCIE_LTSSM_DETECT_QUIET = 0x0, > > > + DW_PCIE_LTSSM_DETECT_ACT = 0x1, > > > + DW_PCIE_LTSSM_L0 = 0x11, > > > + DW_PCIE_LTSSM_L2_IDLE = 0x15, > > > +}; > > > + > > > struct dw_pcie_host_ops { > > > int (*host_init)(struct dw_pcie_rp *pp); > > > void (*host_deinit)(struct dw_pcie_rp *pp); > > > int (*msi_host_init)(struct dw_pcie_rp *pp); > > > + void (*pme_turn_off)(struct dw_pcie_rp *pp); > > > + void (*exit_from_l2)(struct dw_pcie_rp *pp); > > > }; > > > > > > struct dw_pcie_rp { > > > @@ -364,6 +375,7 @@ struct dw_pcie_ops { > > > void (*write_dbi2)(struct dw_pcie *pcie, void __iomem *base, u32 reg, > > > size_t size, u32 val); > > > int (*link_up)(struct dw_pcie *pcie); > > > + enum dw_pcie_ltssm (*get_ltssm)(struct dw_pcie *pcie); > > > int (*start_link)(struct dw_pcie *pcie); > > > void (*stop_link)(struct dw_pcie *pcie); > > > }; > > > @@ -393,6 +405,7 @@ struct dw_pcie { > > > struct reset_control_bulk_data app_rsts[DW_PCIE_NUM_APP_RSTS]; > > > struct reset_control_bulk_data core_rsts[DW_PCIE_NUM_CORE_RSTS]; > > > struct gpio_desc *pe_rst; > > > + bool suspended; > > > }; > > > > > > #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp) > > > @@ -430,6 +443,9 @@ void dw_pcie_iatu_detect(struct dw_pcie *pci); > > > int dw_pcie_edma_detect(struct dw_pcie *pci); > > > void dw_pcie_edma_remove(struct dw_pcie *pci); > > > > > > +int dw_pcie_suspend_noirq(struct dw_pcie *pci); > > > +int dw_pcie_resume_noirq(struct dw_pcie *pci); > > > + > > > static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val) > > > { > > > dw_pcie_write_dbi(pci, reg, 0x4, val); > > > @@ -501,6 +517,18 @@ static inline void dw_pcie_stop_link(struct dw_pcie *pci) > > > pci->ops->stop_link(pci); > > > } > > > > > > +static inline enum dw_pcie_ltssm dw_pcie_get_ltssm(struct dw_pcie *pci) > > > +{ > > > + u32 val; > > > + > > > + if (pci->ops && pci->ops->get_ltssm) > > > + return pci->ops->get_ltssm(pci); > > > + > > > + val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0); > > > + > > > + return (enum dw_pcie_ltssm)FIELD_GET(PORT_LOGIC_LTSSM_STATE_MASK, val); > > > +} > > > + > > > #ifdef CONFIG_PCIE_DW_HOST > > > irqreturn_t dw_handle_msi_irq(struct dw_pcie_rp *pp); > > > int dw_pcie_setup_rc(struct dw_pcie_rp *pp); > > > -- > > > 2.34.1 > > > > > > > -- > > மணிவண்ணன் சதாசிவம் -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BA96BEB64DA for ; Wed, 19 Jul 2023 06:07:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fbffL/bMEEghZgEOdGEnqjuSV83xiWw1q17IHZjN/WI=; b=veAiy9fvs/Dker Co4knJaZOIBWTIGi5wVYuvUno39h9YTlWRdUY3ZyAHgtvZYbMFBvo4JFfoswkFZxFNd5jrsQ9OPug bZ2UJFLLMyzp1lDOiAoZY4KxLnOWr9jOm8ZNe2kAUJe1d808ZQf93rmxlMXcAd034SV1WrpSLbDtZ lUgWXFyLjbybr6WgcYfvTasL9SvPJ6akVh7To+azRAuQa9qf0DvMW1QnKD3d7jDYM+PdxJNW7Wo8Z BC9tVkQPuLnhVIe88PzZEQmO8HKS4Xmk9oYbrJ1XrEHZS0Vs1CYiWA7olTIpbWPfSQrHunrJPHGeB CLRsQg8SYyR1pYRcUXfg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qM0LN-005YXb-0n; Wed, 19 Jul 2023 06:07:25 +0000 Received: from desiato.infradead.org ([90.155.92.199]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qM0LL-005YW6-0F for linux-arm-kernel@bombadil.infradead.org; Wed, 19 Jul 2023 06:07:23 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Transfer-Encoding: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date: Sender:Reply-To:Content-ID:Content-Description; bh=q8SeKt7yN+XQsB1G9b1zgzzmxX/gZUeZNlUnNdCUVe4=; b=A7GnulKZrCbs8G9B/SJDrkXhML kBfU7KM3gBTrsUcSuZp+O4zTx24iWyAiROaAHSF1T4Tg2VpcqH1t4Yj+tGiG+gh0w8Fq8su7LOWil RL8QoP662n8v5XdXdqjGJLb1IGTnRpE48z1dTp5RETebhWfyh9zHW5AcRWF8rFXLlutVq8qFvHBjj 8Dd8lI434V0PRw6PsD6LoBCEOSbmCuSl0NwWvggM3yxn5tqJWX5Y8/JQs3l3DzHdX3D1VIOb82EpC zUsaXUGPgwCF78zam2X5PnSGiGxaJOpQP3Aq+h3r9PTr4BQWeocGU49YXSCPsqxTBbMkk3aaal3V4 QPQxwWkg==; Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by desiato.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qLhaC-00BOi5-0m for linux-arm-kernel@lists.infradead.org; Tue, 18 Jul 2023 10:05:30 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AFDC461503; Tue, 18 Jul 2023 10:04:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 49198C433C8; Tue, 18 Jul 2023 10:04:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1689674666; bh=9HH4kTQ98mOmfmk0yY7rNImccRI+W5P4UqFEPSZVV+E=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=VUNa+MHEP8kN+Jbkz9qEImYZfvvRiItufnkud87Y7kCZczsdQfodaFaPh+Dukm72h DxhBsnqDzgX8e99gPyeSARMyfoV/PyJ1W5hkisd11jSmeyKWMHjopJstVT7lTrIVAV l7ioLo0zO6E1uHDZCo8OFR4q2b/VSQrbUQ6WvnurW6TmsjZGWHijxg9zOnq9LUB5b1 tvx6y8hTzzeTu2xh89bhDeSSbgq2S99eOBuCZf842dgD075G5YlS6KdcjjJNVfhoJF gO4ftTWuSdCHogV+aAqGWROKE8Czd9lvQ1HERt3u4OP97qZkgTodR65KrPM1g+9gra MfpcymC03zTDQ== Date: Tue, 18 Jul 2023 15:34:00 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: Manivannan Sadhasivam , helgaas@kernel.org, imx@lists.linux.dev, bhelgaas@google.com, devicetree@vger.kernel.org, gustavo.pimentel@synopsys.com, kw@linux.com, leoyang.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lorenzo.pieralisi@arm.com, minghuan.lian@nxp.com, mingkai.hu@nxp.com, robh+dt@kernel.org, roy.zang@nxp.com, shawnguo@kernel.org, zhiqiang.hou@nxp.com Subject: Re: [PATCH v3 1/2] PCI: dwc: Implement general suspend/resume functionality for L2/L3 transitions Message-ID: <20230718100400.GB4771@thinkpad> References: <20230419164118.596300-1-Frank.Li@nxp.com> <20230717164526.GC35455@thinkpad> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230718_110528_636106_7F60455F X-CRM114-Status: GOOD ( 46.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gTW9uLCBKdWwgMTcsIDIwMjMgYXQgMDI6MzY6MTlQTSAtMDQwMCwgRnJhbmsgTGkgd3JvdGU6 Cj4gT24gTW9uLCBKdWwgMTcsIDIwMjMgYXQgMTA6MTU6MjZQTSArMDUzMCwgTWFuaXZhbm5hbiBT YWRoYXNpdmFtIHdyb3RlOgo+ID4gT24gV2VkLCBBcHIgMTksIDIwMjMgYXQgMTI6NDE6MTdQTSAt MDQwMCwgRnJhbmsgTGkgd3JvdGU6Cj4gPiA+IEludHJvZHVjZWQgaGVscGVyIGZ1bmN0aW9uIGR3 X3BjaWVfZ2V0X2x0c3NtIHRvIHJldHJpZXZlIFNNTEhfTFRTU19TVEFURS4KPiA+ID4gQWRkZWQg QVBJIHBtZV90dXJuX29mZiBhbmQgZXhpdF9mcm9tX2wyIGZvciBtYW5hZ2luZyBMMi9MMyBzdGF0 ZSB0cmFuc2l0aW9ucy4KPiA+ID4gCj4gPiA+IFR5cGljYWwgTDIgZW50cnkgd29ya2Zsb3c6Cj4g PiA+IAo+ID4gPiAxLiBUcmFuc21pdCBQTUUgdHVybiBvZmYgc2lnbmFsIHRvIFBDSSBkZXZpY2Vz Lgo+ID4gPiAyLiBBd2FpdCBsaW5rIGVudGVyaW5nIEwyX0lETEUgc3RhdGUuCj4gPiAKPiA+IEFG QUlLLCB0eXBpY2FsIHdvcmtmbG93IGlzIHRvIHdhaXQgZm9yIFBNRV9Ub19BY2suCj4gCj4gMSBB bHJlYWR5IHdhaXQgZm9yIFBNRV90b19BQ0ssICAyLCBqdXN0IHdhaXQgZm9yIGxpbmsgYWN0dWFs IGVudGVyIEwyLgo+IEkgdGhpbmsgUENJIFJDIG5lZWRzIHNvbWUgdGltZSB0byBzZXQgbGluayBl bnRlciBMMiBhZnRlciBnZXQgQUNLIGZyb20KPiBQTUUuCj4gCj4gPiAKPiA+ID4gMy4gVHJhbnNp dGlvbiBSb290IGNvbXBsZXggdG8gRDMgc3RhdGUuCj4gPiA+IAo+ID4gPiBUeXBpY2FsIEwyIGV4 aXQgd29ya2Zsb3c6Cj4gPiA+IAo+ID4gPiAxLiBUcmFuc2l0aW9uIFJvb3QgY29tcGxleCB0byBE MCBzdGF0ZS4KPiA+ID4gMi4gSXNzdWUgZXhpdCBmcm9tIEwyIGNvbW1hbmQuCj4gPiA+IDMuIFJl aW5pdGlhbGl6ZSBQQ0kgaG9zdC4KPiA+ID4gNC4gV2FpdCBmb3IgbGluayB0byBiZWNvbWUgYWN0 aXZlLgo+ID4gPiAKPiA+ID4gU2lnbmVkLW9mZi1ieTogRnJhbmsgTGkgPEZyYW5rLkxpQG54cC5j b20+Cj4gPiA+IC0tLQo+ID4gPiBDaGFuZ2UgZnJvbSB2MiB0byB2MzogCj4gPiA+IC0gQmFzaWMg cmV3cml0ZSB3aG9sZSBwYXRjaCBhY2NvcmRpbmcgcm9iIGhlcnJ5IHN1Z2dlc3Rpb24uIAo+ID4g PiAgIHB1dCBjb21tb24gZnVuY3Rpb24gaW50byBkd2MsIHNvIG1vcmUgc29jIGNhbiBzaGFyZSB0 aGUgc2FtZSBsb2dpYy4KPiA+ID4gICAKPiA+ID4gIC4uLi9wY2kvY29udHJvbGxlci9kd2MvcGNp ZS1kZXNpZ253YXJlLWhvc3QuYyB8IDgwICsrKysrKysrKysrKysrKysrKysKPiA+ID4gIGRyaXZl cnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaWUtZGVzaWdud2FyZS5oICB8IDI4ICsrKysrKysKPiA+ ID4gIDIgZmlsZXMgY2hhbmdlZCwgMTA4IGluc2VydGlvbnMoKykKPiA+ID4gCj4gPiA+IGRpZmYg LS1naXQgYS9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2llLWRlc2lnbndhcmUtaG9zdC5j IGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLWhvc3QuYwo+ID4g PiBpbmRleCA5OTUyMDU3Yzg4MTkuLmVmNjg2OTQ4OGJkZSAxMDA2NDQKPiA+ID4gLS0tIGEvZHJp dmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLWhvc3QuYwo+ID4gPiArKysg Yi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2llLWRlc2lnbndhcmUtaG9zdC5jCj4gPiA+ IEBAIC04LDYgKzgsNyBAQAo+ID4gPiAgICogQXV0aG9yOiBKaW5nb28gSGFuIDxqZzEuaGFuQHNh bXN1bmcuY29tPgo+ID4gPiAgICovCj4gPiA+ICAKPiA+ID4gKyNpbmNsdWRlIDxsaW51eC9pb3Bv bGwuaD4KPiA+ID4gICNpbmNsdWRlIDxsaW51eC9pcnFjaGlwL2NoYWluZWRfaXJxLmg+Cj4gPiA+ ICAjaW5jbHVkZSA8bGludXgvaXJxZG9tYWluLmg+Cj4gPiA+ICAjaW5jbHVkZSA8bGludXgvbXNp Lmg+Cj4gPiA+IEBAIC04MDcsMyArODA4LDgyIEBAIGludCBkd19wY2llX3NldHVwX3JjKHN0cnVj dCBkd19wY2llX3JwICpwcCkKPiA+ID4gIAlyZXR1cm4gMDsKPiA+ID4gIH0KPiA+ID4gIEVYUE9S VF9TWU1CT0xfR1BMKGR3X3BjaWVfc2V0dXBfcmMpOwo+ID4gPiArCj4gPiA+ICsvKgo+ID4gPiAr ICogVGhlcmUgYXJlIGZvciBjb25maWd1cmluZyBob3N0IGNvbnRyb2xsZXJzLCB3aGljaCBhcmUg YnJpZGdlcyAqdG8qIFBDSSBkZXZpY2VzCj4gPiA+ICsgKiBidXQgYXJlIG5vdCBQQ0kgZGV2aWNl cyB0aGVtc2VsdmVzLgo+ID4gCj4gPiBOb25lIG9mIHRoZSBmdW5jdGlvbnMgYXBwbGljYWJsZSB0 byB0aGUgZGV2aWNlcy4gU28gdGhlcmUgaXMgbm8gbmVlZCBmb3IgdGhpcwo+ID4gY29tbWVudC4K PiAKPiBJIGNvcHkgY29tbWVudHMgaW4gZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpZS1k ZXNpZ253YXJlLmMuCj4gCj4gLyoKPiAgKiBUaGVzZSBpbnRlcmZhY2VzIHJlc2VtYmxlIHRoZSBw Y2lfZmluZF8qY2FwYWJpbGl0eSgpIGludGVyZmFjZXMsIGJ1dCB0aGVzZQo+ICAqIGFyZSBmb3Ig Y29uZmlndXJpbmcgaG9zdCBjb250cm9sbGVycywgd2hpY2ggYXJlIGJyaWRnZXMgKnRvKiBQQ0kg ZGV2aWNlcyBidXQKPiAgKiBhcmUgbm90IFBDSSBkZXZpY2VzIHRoZW1zZWx2ZXMuCj4gICovCj4g c3RhdGljIHU4IF9fZHdfcGNpZV9maW5kX25leHRfY2FwKHN0cnVjdCBkd19wY2llICpwY2ksIHU4 IGNhcF9wdHIsCj4gICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIHU4IGNhcCkKPiAK PiAKPiBJIHRoaW5rIGl0IGlzIHJlYXNvbmFsYmxlIGJlY2F1c2UgaXQgaXMgdG9vIHNpbWlsYXIg d2l0aCBzdGFuZGFyZCBBUEkKPiBwY2lfc2V0X3Bvd2VyX3N0YXRlKCk7Cj4gCgpPaywgdGhlbiBw bGVhc2UgYWRkIHRoaXMgQVBJIHNpbWlsYXJpdHkgaW4gdGhlIGNvbW1lbnQgYXMgbGlrZQpfX2R3 X3BjaWVfZmluZF9uZXh0X2NhcCgpLiBBbHNvIGNoYW5nZSAiVGhlcmUiIHRvICJUaGVzZSIuCgo+ ID4gCj4gPiA+ICsgKi8KPiA+ID4gK3N0YXRpYyB2b2lkIGR3X3BjaWVfc2V0X2RzdGF0ZShzdHJ1 Y3QgZHdfcGNpZSAqcGNpLCB1MzIgZHN0YXRlKQo+ID4gCj4gPiBQbGVhc2UgdXNlIHBjaV9wb3dl cl90IGRlZmluZXMgZm9yIGRzdGF0ZXMuCj4gCj4gQWx0aG91Z2ggZHdjIHVzZSB0aGUgc2FtZSBk ZWZpbmUsIGl0IGlzIGRpZmZlcmVuY2UgdGhpbmdzLiAKPiAKClNvcnJ5LCB3aGF0IGRpZmZlcmVu Y2U/IENvdWxkIHlvdSBwbGVhc2UgY2xhcmlmeT8KCj4gPiAKPiA+ID4gK3sKPiA+ID4gKwl1OCBv ZmZzZXQgPSBkd19wY2llX2ZpbmRfY2FwYWJpbGl0eShwY2ksIFBDSV9DQVBfSURfUE0pOwo+ID4g PiArCXUzMiB2YWw7Cj4gPiA+ICsKPiA+ID4gKwl2YWwgPSBkd19wY2llX3JlYWR3X2RiaShwY2ks IG9mZnNldCArIFBDSV9QTV9DVFJMKTsKPiA+IAo+ID4gUGxlYXNlIHVzZSBQQ0kgYWNjZXNzb3Jz IGZvciBhY2Nlc3Npbmcgc3BlYyBjb21wbGlhbnQgcmVnaXN0ZXJzLgo+IAo+IEFjY29yZGluZyB0 byBjb21tZW50cyBpbiBwY2llLWRlc2lnbndhcmUuYywgaXQgaXMgZGlmZmVyZW5jZSBjb25jZXB0 Cj4gZXZlbiB0aG91Z2ggcmVnaXN0ZXIgZGVmaW5lIGlzIHRoZSBzYW1lIGFzIFBDSSBzcGVjLiBJ dCB3YXMgdXNlZCB0bwo+IGNvbnRyb2wgcm9vdCBicmlkZ2VzLgo+IAoKQWgsIEkgZ290IHNsaWdo dGx5IGNvbmZ1c2VkLiBUaGlzIGlzIGZpbmUuCgo+ID4gCj4gPiA+ICsJdmFsICY9IH5QQ0lfUE1f Q1RSTF9TVEFURV9NQVNLOwo+ID4gPiArCXZhbCB8PSBkc3RhdGU7Cj4gPiA+ICsJZHdfcGNpZV93 cml0ZXdfZGJpKHBjaSwgb2Zmc2V0ICsgUENJX1BNX0NUUkwsIHZhbCk7Cj4gPiA+ICt9Cj4gPiA+ ICsKPiA+ID4gK2ludCBkd19wY2llX3N1c3BlbmRfbm9pcnEoc3RydWN0IGR3X3BjaWUgKnBjaSkK PiA+ID4gK3sKPiA+ID4gKwl1MzIgdmFsOwo+ID4gPiArCWludCByZXQ7Cj4gPiA+ICsKPiA+ID4g KwlpZiAoZHdfcGNpZV9nZXRfbHRzc20ocGNpKSA8PSBEV19QQ0lFX0xUU1NNX0RFVEVDVF9BQ1Qp Cj4gPiA+ICsJCXJldHVybiAwOwo+ID4gPiArCj4gPiA+ICsJcGNpLT5wcC5vcHMtPnBtZV90dXJu X29mZigmcGNpLT5wcCk7Cj4gPiAKPiA+IFlvdSBzaG91bGQgZmlyc3QgY2hlY2sgZm9yIHRoZSBl eGlzdGVuY2Ugb2YgdGhlIGNhbGxiYWNrIGJlZm9yZSBpbnZva2luZy4gVGhpcwo+ID4gYXBwbGll cyB0byBhbGwgY2FsbGJhY2tzIGluIHRoaXMgcGF0Y2guCj4gCj4gWWVzLCBJIHdpbGwgdXBkYXRl Lgo+IAo+ID4gCj4gPiA+ICsKPiA+ID4gKwkvKgo+ID4gPiArCSAqIFBDSSBFeHByZXNzIEJhc2Ug U3BlY2lmaWNhdGlvbiBSZXYgNC4wCj4gPiA+ICsJICogNS4zLjMuMi4xIFBNRSBTeW5jaHJvbml6 YXRpb24KPiA+ID4gKwkgKiBSZWNvbW1hbmQgMW1zIHRvIDEwbXMgdGltZW91dCB0byBjaGVjayBM MiByZWFkeQo+ID4gPiArCSAqLwo+ID4gPiArCXJldCA9IHJlYWRfcG9sbF90aW1lb3V0KGR3X3Bj aWVfZ2V0X2x0c3NtLCB2YWwsIHZhbCA9PSBEV19QQ0lFX0xUU1NNX0wyX0lETEUsCj4gPiA+ICsJ CQkJMTAwLCAxMDAwMCwgZmFsc2UsIHBjaSk7Cj4gPiAKPiA+IElzIHRoZXJlIG5vIHdheSB0byB3 YWl0IGZvciBQTUVfVG9fQWNrIFRMUD8KPiAKPiAKPiBTdXBwb3NlIFBNRV90dXJuX29mZiBzaG91 bGQgd2FpdCBmb3IgQUNLIGJlZm9yZSByZXR1cm4uIAoKT2suIEkgZGlkbid0IHNlZSB0aGlzIGJl aGF2aW9yIGluIHRoZSBzcGVjLCBoZW5jZSBjdXJpb3VzLgoKPiBIZXJlLCBqdXN0IG1ha2Ugc3Vy ZSBMaW5rIGVudGVyIEwyIHN0YXR1cy4gSGFyZHdhcmUgbmVlZCBzb21lIHRpbWUgdG8gcHV0Cj4g bGluayB0byBMMiBhZnRlciBnZXQgQUNLIGZyb20gYnVzLCBldmVuIGl0IGlzIHZlcnkgc2hvcnQg Z2VuZXJhbGx5Lgo+IAoKRmluZSB0aGVuLiBCdXQgY2FuIHdlIGNoZWNrIGZvciBQTV9MSU5LU1Rf SU5fTDIgU0lJIFN5c3RlbSBJbmZvcm1hdGlvbiBJbnRlcmZhY2UKKFNJSSkgaW5zdGVhZCBvZiBM VFNTTSBzdGF0ZT8KCj4gPiAKPiA+ID4gKwlpZiAocmV0KSB7Cj4gPiA+ICsJCWRldl9lcnIocGNp LT5kZXYsICJQQ0llIGxpbmsgZW50ZXIgTDIgdGltZW91dCEgbHRzc20gPSAweCV4XG4iLCB2YWwp Owo+ID4gPiArCQlyZXR1cm4gcmV0Owo+ID4gPiArCX0KPiA+ID4gKwo+ID4gPiArCWR3X3BjaWVf c2V0X2RzdGF0ZShwY2ksIDB4Myk7Cj4gPiA+ICsKPiA+ID4gKwlwY2ktPnN1c3BlbmRlZCA9IHRy dWU7Cj4gPiA+ICsKPiA+ID4gKwlyZXR1cm4gcmV0Owo+ID4gPiArfQo+ID4gPiArRVhQT1JUX1NZ TUJPTF9HUEwoZHdfcGNpZV9zdXNwZW5kX25vaXJxKTsKPiA+ID4gKwo+ID4gPiAraW50IGR3X3Bj aWVfcmVzdW1lX25vaXJxKHN0cnVjdCBkd19wY2llICpwY2kpCj4gPiA+ICt7Cj4gPiA+ICsJaW50 IHJldDsKPiA+ID4gKwo+ID4gPiArCWlmICghcGNpLT5zdXNwZW5kZWQpCj4gPiA+ICsJCXJldHVy biAwOwo+ID4gPiArCj4gPiA+ICsJcGNpLT5zdXNwZW5kZWQgPSBmYWxzZTsKPiA+ID4gKwo+ID4g PiArCWR3X3BjaWVfc2V0X2RzdGF0ZShwY2ksIDB4MCk7Cj4gPiA+ICsKPiA+ID4gKwlwY2ktPnBw Lm9wcy0+ZXhpdF9mcm9tX2wyKCZwY2ktPnBwKTsKPiA+ID4gKwo+ID4gPiArCS8qIGRlbGF5IDEw IG1zIHRvIGFjY2VzcyBFUCAqLwo+ID4gCj4gPiBJcyB0aGlzIGRlbGF5IGFzIHBhcnQgb2YgdGhl IERXQyBzcGVjPyBJZiBzbywgcGxlYXNlIHF1b3RlIHRoZSBzZWN0aW9uLgo+ID4gCj4gPiA+ICsJ bWRlbGF5KDEwKTsKPiA+ID4gKwo+ID4gPiArCXJldCA9IHBjaS0+cHAub3BzLT5ob3N0X2luaXQo JnBjaS0+cHApOwo+ID4gPiArCWlmIChyZXQpIHsKPiA+ID4gKwkJZGV2X2VycihwY2ktPmRldiwg ImxzX3BjaWVfaG9zdF9pbml0IGZhaWxlZCEgcmV0ID0gMHgleFxuIiwgcmV0KTsKPiA+IAo+ID4g cy9sc19wY2llX2hvc3RfaW5pdC9Ib3N0IGluaXQKPiA+IAo+ID4gPiArCQlyZXR1cm4gcmV0Owo+ ID4gPiArCX0KPiA+ID4gKwo+ID4gPiArCWR3X3BjaWVfc2V0dXBfcmMoJnBjaS0+cHApOwo+ID4g PiArCj4gPiAKPiA+IERvbid0IHlvdSBuZWVkIHRvIGNvbmZpZ3VyZSBpQVRVPwo+ID4gCj4gPiA+ ICsJcmV0ID0gZHdfcGNpZV93YWl0X2Zvcl9saW5rKHBjaSk7Cj4gPiAKPiA+IERvbid0IHlvdSBu ZWVkIHRvIHN0YXJ0IHRoZSBsaW5rIGJlZm9yZWhhbmQ/Cj4gCj4gU3VwcG9zZSBuZWVkIHN0YXJ0 IGxpbmssIGl0IHdvcmtzIGF0IGxheWVyc2NhcGUgcGxhdGZvcm0ganVzdCBiZWNhdXNlIGR3Ywo+ IGhhdmUgbm90IGZ1bGwgcG93ZXIgb2ZmLiBzb21lIHN0YXRlIHN0aWxsIGtlcHQuCj4gCgpJdCBt YXkgd29yayBmb3IgeW91ciBwbGF0Zm9ybSBidXQgbm90IGZvciBhbGwgaWYgdGhlIHBvd2VyIGdl dHMgcmVtb3ZlZC4gU28KcGxlYXNlIHN0YXJ0IHRoZSBsaW5rIG1hbnVhbGx5LgoKLSBNYW5pCgo+ ID4gCj4gPiA+ICsJaWYgKHJldCkgewo+ID4gPiArCQlkZXZfZXJyKHBjaS0+ZGV2LCAid2FpdCBs aW5rIHVwIHRpbWVvdXQhIHJldCA9IDB4JXhcbiIsIHJldCk7Cj4gPiAKPiA+IGR3X3BjaWVfd2Fp dF9mb3JfbGluaygpIGl0c2VsZiBwcmludHMgZXJyb3IgbWVzc2FnZSBvbiBmYWlsdXJlLiBTbyBu byBuZWVkIHRvIGRvCj4gPiB0aGUgc2FtZSBoZXJlLgo+IAo+IE9rYXkKPiAKPiA+IAo+ID4gLSBN YW5pCj4gPiAKPiA+ID4gKwkJcmV0dXJuIHJldDsKPiA+ID4gKwl9Cj4gPiA+ICsKPiA+ID4gKwly ZXR1cm4gcmV0Owo+ID4gPiArfQo+ID4gPiArRVhQT1JUX1NZTUJPTF9HUEwoZHdfcGNpZV9yZXN1 bWVfbm9pcnEpOwo+ID4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2Mv cGNpZS1kZXNpZ253YXJlLmggYi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2llLWRlc2ln bndhcmUuaAo+ID4gPiBpbmRleCA3OTcxM2NlMDc1Y2MuLmVmZmIwN2E1MDZlNCAxMDA2NDQKPiA+ ID4gLS0tIGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLmgKPiA+ ID4gKysrIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLmgKPiA+ ID4gQEAgLTI4OCwxMCArMjg4LDIxIEBAIGVudW0gZHdfcGNpZV9jb3JlX3JzdCB7Cj4gPiA+ICAJ RFdfUENJRV9OVU1fQ09SRV9SU1RTCj4gPiA+ICB9Owo+ID4gPiAgCj4gPiA+ICtlbnVtIGR3X3Bj aWVfbHRzc20gewo+ID4gPiArCURXX1BDSUVfTFRTU01fVU5LTk9XTiA9IDB4RkZGRkZGRkYsCj4g PiA+ICsJLyogTmVlZCBhbGlnbiBQQ0lFX1BPUlRfREVCVUcwIGJpdDA6NSAqLwo+ID4gPiArCURX X1BDSUVfTFRTU01fREVURUNUX1FVSUVUID0gMHgwLAo+ID4gPiArCURXX1BDSUVfTFRTU01fREVU RUNUX0FDVCA9IDB4MSwKPiA+ID4gKwlEV19QQ0lFX0xUU1NNX0wwID0gMHgxMSwKPiA+ID4gKwlE V19QQ0lFX0xUU1NNX0wyX0lETEUgPSAweDE1LAo+ID4gPiArfTsKPiA+ID4gKwo+ID4gPiAgc3Ry dWN0IGR3X3BjaWVfaG9zdF9vcHMgewo+ID4gPiAgCWludCAoKmhvc3RfaW5pdCkoc3RydWN0IGR3 X3BjaWVfcnAgKnBwKTsKPiA+ID4gIAl2b2lkICgqaG9zdF9kZWluaXQpKHN0cnVjdCBkd19wY2ll X3JwICpwcCk7Cj4gPiA+ICAJaW50ICgqbXNpX2hvc3RfaW5pdCkoc3RydWN0IGR3X3BjaWVfcnAg KnBwKTsKPiA+ID4gKwl2b2lkICgqcG1lX3R1cm5fb2ZmKShzdHJ1Y3QgZHdfcGNpZV9ycCAqcHAp Owo+ID4gPiArCXZvaWQgKCpleGl0X2Zyb21fbDIpKHN0cnVjdCBkd19wY2llX3JwICpwcCk7Cj4g PiA+ICB9Owo+ID4gPiAgCj4gPiA+ICBzdHJ1Y3QgZHdfcGNpZV9ycCB7Cj4gPiA+IEBAIC0zNjQs NiArMzc1LDcgQEAgc3RydWN0IGR3X3BjaWVfb3BzIHsKPiA+ID4gIAl2b2lkICAgICgqd3JpdGVf ZGJpMikoc3RydWN0IGR3X3BjaWUgKnBjaWUsIHZvaWQgX19pb21lbSAqYmFzZSwgdTMyIHJlZywK PiA+ID4gIAkJCSAgICAgIHNpemVfdCBzaXplLCB1MzIgdmFsKTsKPiA+ID4gIAlpbnQJKCpsaW5r X3VwKShzdHJ1Y3QgZHdfcGNpZSAqcGNpZSk7Cj4gPiA+ICsJZW51bSBkd19wY2llX2x0c3NtICgq Z2V0X2x0c3NtKShzdHJ1Y3QgZHdfcGNpZSAqcGNpZSk7Cj4gPiA+ICAJaW50CSgqc3RhcnRfbGlu aykoc3RydWN0IGR3X3BjaWUgKnBjaWUpOwo+ID4gPiAgCXZvaWQJKCpzdG9wX2xpbmspKHN0cnVj dCBkd19wY2llICpwY2llKTsKPiA+ID4gIH07Cj4gPiA+IEBAIC0zOTMsNiArNDA1LDcgQEAgc3Ry dWN0IGR3X3BjaWUgewo+ID4gPiAgCXN0cnVjdCByZXNldF9jb250cm9sX2J1bGtfZGF0YQlhcHBf cnN0c1tEV19QQ0lFX05VTV9BUFBfUlNUU107Cj4gPiA+ICAJc3RydWN0IHJlc2V0X2NvbnRyb2xf YnVsa19kYXRhCWNvcmVfcnN0c1tEV19QQ0lFX05VTV9DT1JFX1JTVFNdOwo+ID4gPiAgCXN0cnVj dCBncGlvX2Rlc2MJCSpwZV9yc3Q7Cj4gPiA+ICsJYm9vbAkJCXN1c3BlbmRlZDsKPiA+ID4gIH07 Cj4gPiA+ICAKPiA+ID4gICNkZWZpbmUgdG9fZHdfcGNpZV9mcm9tX3BwKHBvcnQpIGNvbnRhaW5l cl9vZigocG9ydCksIHN0cnVjdCBkd19wY2llLCBwcCkKPiA+ID4gQEAgLTQzMCw2ICs0NDMsOSBA QCB2b2lkIGR3X3BjaWVfaWF0dV9kZXRlY3Qoc3RydWN0IGR3X3BjaWUgKnBjaSk7Cj4gPiA+ICBp bnQgZHdfcGNpZV9lZG1hX2RldGVjdChzdHJ1Y3QgZHdfcGNpZSAqcGNpKTsKPiA+ID4gIHZvaWQg ZHdfcGNpZV9lZG1hX3JlbW92ZShzdHJ1Y3QgZHdfcGNpZSAqcGNpKTsKPiA+ID4gIAo+ID4gPiAr aW50IGR3X3BjaWVfc3VzcGVuZF9ub2lycShzdHJ1Y3QgZHdfcGNpZSAqcGNpKTsKPiA+ID4gK2lu dCBkd19wY2llX3Jlc3VtZV9ub2lycShzdHJ1Y3QgZHdfcGNpZSAqcGNpKTsKPiA+ID4gKwo+ID4g PiAgc3RhdGljIGlubGluZSB2b2lkIGR3X3BjaWVfd3JpdGVsX2RiaShzdHJ1Y3QgZHdfcGNpZSAq cGNpLCB1MzIgcmVnLCB1MzIgdmFsKQo+ID4gPiAgewo+ID4gPiAgCWR3X3BjaWVfd3JpdGVfZGJp KHBjaSwgcmVnLCAweDQsIHZhbCk7Cj4gPiA+IEBAIC01MDEsNiArNTE3LDE4IEBAIHN0YXRpYyBp bmxpbmUgdm9pZCBkd19wY2llX3N0b3BfbGluayhzdHJ1Y3QgZHdfcGNpZSAqcGNpKQo+ID4gPiAg CQlwY2ktPm9wcy0+c3RvcF9saW5rKHBjaSk7Cj4gPiA+ICB9Cj4gPiA+ICAKPiA+ID4gK3N0YXRp YyBpbmxpbmUgZW51bSBkd19wY2llX2x0c3NtIGR3X3BjaWVfZ2V0X2x0c3NtKHN0cnVjdCBkd19w Y2llICpwY2kpCj4gPiA+ICt7Cj4gPiA+ICsJdTMyIHZhbDsKPiA+ID4gKwo+ID4gPiArCWlmIChw Y2ktPm9wcyAmJiBwY2ktPm9wcy0+Z2V0X2x0c3NtKQo+ID4gPiArCQlyZXR1cm4gcGNpLT5vcHMt PmdldF9sdHNzbShwY2kpOwo+ID4gPiArCj4gPiA+ICsJdmFsID0gZHdfcGNpZV9yZWFkbF9kYmko cGNpLCBQQ0lFX1BPUlRfREVCVUcwKTsKPiA+ID4gKwo+ID4gPiArCXJldHVybiAoZW51bSBkd19w Y2llX2x0c3NtKUZJRUxEX0dFVChQT1JUX0xPR0lDX0xUU1NNX1NUQVRFX01BU0ssIHZhbCk7Cj4g PiA+ICt9Cj4gPiA+ICsKPiA+ID4gICNpZmRlZiBDT05GSUdfUENJRV9EV19IT1NUCj4gPiA+ICBp cnFyZXR1cm5fdCBkd19oYW5kbGVfbXNpX2lycShzdHJ1Y3QgZHdfcGNpZV9ycCAqcHApOwo+ID4g PiAgaW50IGR3X3BjaWVfc2V0dXBfcmMoc3RydWN0IGR3X3BjaWVfcnAgKnBwKTsKPiA+ID4gLS0g Cj4gPiA+IDIuMzQuMQo+ID4gPiAKPiA+IAo+ID4gLS0gCj4gPiDgrq7grqPgrr/grrXgrqPgr43g rqPgrqngr40g4K6a4K6k4K6+4K6a4K6/4K614K6u4K+NCgotLSAK4K6u4K6j4K6/4K614K6j4K+N 4K6j4K6p4K+NIOCumuCupOCuvuCumuCuv+CuteCuruCvjQoKX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QK bGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRl YWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo=