From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0B75C04E69 for ; Thu, 27 Jul 2023 08:04:01 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0BD6B867F0; Thu, 27 Jul 2023 10:03:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="aLGAkuJt"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 6E80586812; Thu, 27 Jul 2023 10:01:28 +0200 (CEST) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id F09AA86812 for ; Thu, 27 Jul 2023 10:00:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nm@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 36R80TDl040518; Thu, 27 Jul 2023 03:00:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1690444829; bh=v0Etvc7x1rhEJcMFyxe0JTXsOhqGfTMb+br0VGPrsvU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aLGAkuJtFRCS9BpT02dvZA8ZhyQd6d0qNN1MS6ASL3woL46DRmNRv7EcVuhZBqVDp bUAIXDjJcyFQmBz4qADaIkhyfHyd8dml9RmA/XEY0a1gRC8oQaDzzBMsO6Z/AVHU6M zGQFo8nVCRmEQB5I4sYrDl4+QClKhCmijpEFyiE0= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 36R80Thg022266 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 27 Jul 2023 03:00:29 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 27 Jul 2023 03:00:29 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 27 Jul 2023 03:00:29 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 36R80TmN036453; Thu, 27 Jul 2023 03:00:29 -0500 From: Nishanth Menon To: , Tom Rini CC: Wadim Egorov , Francesco Dolcini , Sjoerd Simons , Neha Malcom Francis , Bryan Brattlof , Vignesh Raghavendra , Marcel Ziswiler , Nikhil Jain , Nishanth Menon Subject: [PATCH 03/16] doc: board: ti: am65x: Update with boot flow diagram Date: Thu, 27 Jul 2023 03:00:14 -0500 Message-ID: <20230727080027.2817701-4-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230727080027.2817701-1-nm@ti.com> References: <20230727080027.2817701-1-nm@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Update the bootflow svg diagram instead of the ascii version Signed-off-by: Nishanth Menon --- doc/board/ti/am65x_evm.rst | 71 +- doc/board/ti/img/boot_diagram_am65.svg | 1835 ++++++++++++++++++++++++ 2 files changed, 1836 insertions(+), 70 deletions(-) create mode 100644 doc/board/ti/img/boot_diagram_am65.svg diff --git a/doc/board/ti/am65x_evm.rst b/doc/board/ti/am65x_evm.rst index 466f720116b2..7876886bc0d3 100644 --- a/doc/board/ti/am65x_evm.rst +++ b/doc/board/ti/am65x_evm.rst @@ -41,76 +41,7 @@ applications. This should happen before running Linux. 3. In production boot flow, we might not like to use full U-Boot, instead use Falcon boot flow to reduce boot time. -.. code-block:: text - - +------------------------------------------------------------------------+ - | DMSC | R5 | A53 | - +------------------------------------------------------------------------+ - | +--------+ | | | - | | Reset | | | | - | +--------+ | | | - | : | | | - | +--------+ | +-----------+ | | - | | *ROM* |----------|-->| Reset rls | | | - | +--------+ | +-----------+ | | - | | | | : | | - | | ROM | | : | | - | |services| | : | | - | | | | +-------------+ | | - | | | | | *R5 ROM* | | | - | | | | +-------------+ | | - | | |<---------|---|Load and auth| | | - | | | | | tiboot3.bin | | | - | | | | +-------------+ | | - | | | | : | | - | | | | : | | - | | | | : | | - | | | | +-------------+ | | - | | | | | *R5 SPL* | | | - | | | | +-------------+ | | - | | | | | Load | | | - | | | | | sysfw.itb | | | - | | Start | | +-------------+ | | - | | System |<---------|---| Start | | | - | |Firmware| | | SYSFW | | | - | +--------+ | +-------------+ | | - | : | | | | | - | +---------+ | | Load | | | - | | *SYSFW* | | | system | | | - | +---------+ | | Config data | | | - | | |<--------|---| | | | - | | | | +-------------+ | | - | | | | | | | | - | | | | | DDR | | | - | | | | | config | | | - | | | | +-------------+ | | - | | | | | | | | - | | |<--------|---| Start A53 | | | - | | | | | and Reset | | | - | | | | +-------------+ | | - | | | | | +-----------+ | - | | |---------|-----------------------|---->| Reset rls | | - | | | | | +-----------+ | - | | DMSC | | | : | - | |Services | | | +------------+ | - | | |<--------|-----------------------|---->|*ATF/OP-TEE*| | - | | | | | +------------+ | - | | | | | : | - | | | | | +-----------+ | - | | |<--------|-----------------------|---->| *A53 SPL* | | - | | | | | +-----------+ | - | | | | | | Load | | - | | | | | | u-boot.img| | - | | | | | +-----------+ | - | | | | | : | - | | | | | +-----------+ | - | | |<--------|-----------------------|---->| *U-Boot* | | - | | | | | +-----------+ | - | | | | | | prompt | | - | | | | | +-----------+ | - | +---------+ | | | - | | | | - +------------------------------------------------------------------------+ +.. image:: img/boot_diagram_am65.svg - Here DMSC acts as master and provides all the critical services. R5/A53 requests DMSC to get these services done as shown in the above diagram. diff --git a/doc/board/ti/img/boot_diagram_am65.svg b/doc/board/ti/img/boot_diagram_am65.svg new file mode 100644 index 000000000000..5ec943e0f49a --- /dev/null +++ b/doc/board/ti/img/boot_diagram_am65.svg @@ -0,0 +1,1835 @@ + + + + + + + + + + + + + Cortex-R + + + + Cortex-R + + + + + + + + + + ROM + + + + ROM + + + + + + + + + Load and auth tiboot3.bin + + + + Load and authtiboot3.bin + + + + + + + + + + Cortex-A + + + + Cortex-A + + + + + + + + + + Load system +config data + + + + Load systemconfig data + + + + + + + + + DDR Config + + + + DDR Config + + + + + + + + + Load tispl.bin + + + + Load tispl.bin + + + + + + + + + Start Cortex-A + + + + Start Cortex-A + + + + + + + + + + Start Cortex-A + + + + Start Cortex-A + + + + + + + + + + + + + + + + + + + + + Aux F/w + + + + Aux F/w + + + + + + + + + + + start SYSFW + + + + start SYSFW + + + + + + + + + SYSFW + + + + SYSFW + + + + + + + + + + Load system config data + + + + Load system config data + + + + + + + + + Start SYSFW + + + + Start SYSFW + + + + + + + + + + Release Reset + + + + Release Reset + + + + + + + + + TF-A  + + + + TF-A  + + + + + + + + + + OP-TEE + + + + OP-TEE + + + + + + + + + + Cortex A SPL + + + + Cortex A SPL + + + + + + + + + + U-boot + + + + U-boot + + + + + + + + + Load u-boot.img + + + + Load u-boot.img + + + + + + + + + Load Aux core f/w +(optional) + + + + Load Aux core f/w(optional) + + + + + + + + + Start Aux core +(optional) + + + + Start Aux core(optional) + + + + + + + + + + Release Reset + + + + Release Reset + + + + + + + + + + CortexR/M +C6x/C7x + + + + CortexR/M + + + + + + + + + + TIFS/DMSC + + + + TIFS/DMSC + + + + + + + + + + ROM + + + + ROM + + + + + + + + + + Security enclave Boot Processor + + + + Security enclaveProcessor + + + + + + + + + + Boot Loader +Processor + + + + Boot LoaderProcessor + + + + + + + + + + Main CPU + + + + Main CPU + + + + + + + + + + Auxiliary +Processor + + + + AuxiliaryProcessor + + + + + + + + + + H/w Seq: Reset rls + + + + H/w Seq: Reset rls + + + + + + + + + + Auth tiboot3.bin + + + + Auth tiboot3.bin + + + + + + + + + + Release Reset + + + + Release Reset + + + + + + + + + Cortex-R SPL + + + + Cortex-R SPL + + + + + + + + + Load sysfw.itb + + + + Load sysfw.itb + + + + + + + + + + Auth SYSFW + + + + Auth SYSFW + + + + + + + Text is not SVG - cannot display + + + -- 2.40.0