From: Andrew Morton <akpm@linux-foundation.org>
To: mm-commits@vger.kernel.org, catalin.marinas@arm.com,
apopple@nvidia.com, 21cnbao@gmail.com, yangyicong@hisilicon.com,
akpm@linux-foundation.org
Subject: + arm64-tlbflush-add-some-comments-for-tlb-batched-flushing.patch added to mm-unstable branch
Date: Tue, 01 Aug 2023 11:33:36 -0700 [thread overview]
Message-ID: <20230801183337.6E2DEC433C8@smtp.kernel.org> (raw)
The patch titled
Subject: arm64: tlbflush: add some comments for TLB batched flushing
has been added to the -mm mm-unstable branch. Its filename is
arm64-tlbflush-add-some-comments-for-tlb-batched-flushing.patch
This patch will shortly appear at
https://git.kernel.org/pub/scm/linux/kernel/git/akpm/25-new.git/tree/patches/arm64-tlbflush-add-some-comments-for-tlb-batched-flushing.patch
This patch will later appear in the mm-unstable branch at
git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
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------------------------------------------------------
From: Yicong Yang <yangyicong@hisilicon.com>
Subject: arm64: tlbflush: add some comments for TLB batched flushing
Date: Tue, 1 Aug 2023 20:42:03 +0800
Add comments for arch_flush_tlb_batched_pending() and
arch_tlbbatch_flush() to illustrate why only a DSB is needed.
Link: https://lkml.kernel.org/r/20230801124203.62164-1-yangyicong@huawei.com
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Alistair Popple <apopple@nvidia.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Barry Song <21cnbao@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
---
arch/arm64/include/asm/tlbflush.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--- a/arch/arm64/include/asm/tlbflush.h~arm64-tlbflush-add-some-comments-for-tlb-batched-flushing
+++ a/arch/arm64/include/asm/tlbflush.h
@@ -304,11 +304,26 @@ static inline void arch_tlbbatch_add_pen
__flush_tlb_page_nosync(mm, uaddr);
}
+/*
+ * If mprotect/munmap/etc occurs during TLB batched flushing, we need to
+ * synchronise all the TLBI issued with a DSB to avoid the race mentioned in
+ * flush_tlb_batched_pending().
+ */
static inline void arch_flush_tlb_batched_pending(struct mm_struct *mm)
{
dsb(ish);
}
+/*
+ * To support TLB batched flush for multiple pages unmapping, we only send
+ * the TLBI for each page in arch_tlbbatch_add_pending() and wait for the
+ * completion at the end in arch_tlbbatch_flush(). Since we've already issued
+ * TLBI for each page so only a DSB is needed to synchronise its effect on the
+ * other CPUs.
+ *
+ * This will save the time waiting on DSB comparing issuing a TLBI;DSB sequence
+ * for each page.
+ */
static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
{
dsb(ish);
_
Patches currently in -mm which might be from yangyicong@hisilicon.com are
mm-tlbbatch-introduce-arch_flush_tlb_batched_pending.patch
arm64-tlbflush-add-some-comments-for-tlb-batched-flushing.patch
reply other threads:[~2023-08-01 18:33 UTC|newest]
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