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From: Conor Dooley <conor@kernel.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 1/3] dt-bindings: clock: versaclock3: Document clock-output-names
Date: Thu, 3 Aug 2023 17:30:32 +0100	[thread overview]
Message-ID: <20230803-derived-patchwork-596f8864b589@spud> (raw)
In-Reply-To: <OS0PR01MB5922B71C39F54441D0E8EDB38608A@OS0PR01MB5922.jpnprd01.prod.outlook.com>

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On Thu, Aug 03, 2023 at 04:25:40PM +0000, Biju Das wrote:
> > Subject: Re: [PATCH 1/3] dt-bindings: clock: versaclock3: Document
> > clock-output-names
> > 
> > On Wed, Aug 02, 2023 at 01:25:08PM +0100, Biju Das wrote:
> > > Document clock-output-names property. Update the example according to
> > > Table 3. ("Output Source") in the 5P35023 datasheet.
> > >
> > > While at it, replace clocks phandle in the example from x1_x2->x1 as
> > > X2 is a different 32768 kHz crystal.
> > >
> > > Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > Closes:
> > > https://lore.kernel.org/all/CAMuHMdUHD+bEco=WYTYWsTAyRt3dTQQt4Xpaejss0
> > > Y2ZpLCMNg@mail.gmail.com/
> > > Fixes: a03d23f860eb ("dt-bindings: clock: Add Renesas versa3 clock
> > > generator bindings")
> > 
> > Nothing in this commit message explains why this is a fix for this
> > binding addition :(
> 
> Basically, it fixes "assigned-clock-rates" for each clock output in the example. Now it is based on Table 3. ("Output Source") in the 5P35023 datasheet(ie: 0= REF, 1=SE1, 2=SE2, 3=SE3, 4=DIFF1, 5=DIFF2).
> 
> The newly added clock-output-names in the example are based on the above table.
> 
> I have added fixes tag, because this patch fixes the clock mapping in the example as per the HW manual.
> 
> Please let me know should I drop fixes tag??

I'm just asking for an explanation in the commit message as to what was
actually wrong in the first place. The commit message says 3 things of
which it's hard to know what is actually a fix without opening & reading
the linked thread on lore.

Cheers,
Conor.

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  reply	other threads:[~2023-08-03 16:30 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-02 12:25 [PATCH 0/3] Fix Versa3 clock mapping Biju Das
2023-08-02 12:25 ` [PATCH 1/3] dt-bindings: clock: versaclock3: Document clock-output-names Biju Das
2023-08-03 16:02   ` Conor Dooley
2023-08-03 16:25     ` Biju Das
2023-08-03 16:30       ` Conor Dooley [this message]
2023-08-03 16:43         ` Biju Das
2023-08-02 12:25 ` [PATCH 2/3] clk: vc3: Fix output clock mapping Biju Das
2023-08-02 12:25 ` [PATCH 3/3] arm64: dts: renesas: rz-smarc-common: Use versa3 clk for audio mclk Biju Das

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