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From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Alex Elder <elder@linaro.org>,
	Srini Kandagatla <srinivas.kandagatla@linaro.org>,
	Andrew Halaney <ahalaney@redhat.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: [PATCH v3 2/9] arm64: dts: qcom: sa8775p: add a node for EMAC1
Date: Thu, 10 Aug 2023 10:09:02 +0200	[thread overview]
Message-ID: <20230810080909.6259-3-brgl@bgdev.pl> (raw)
In-Reply-To: <20230810080909.6259-1-brgl@bgdev.pl>

From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

Add a node for the second MAC on sa8775p platforms.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 33 +++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 38d10af37ab0..73fd8a0c0320 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2325,6 +2325,39 @@ cpufreq_hw: cpufreq@18591000 {
 			#freq-domain-cells = <1>;
 		};
 
+		ethernet1: ethernet@23000000 {
+			compatible = "qcom,sa8775p-ethqos";
+			reg = <0x0 0x23000000 0x0 0x10000>,
+			      <0x0 0x23016000 0x0 0x100>;
+			reg-names = "stmmaceth", "rgmii";
+
+			interrupts = <GIC_SPI 929 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+
+			clocks = <&gcc GCC_EMAC1_AXI_CLK>,
+				 <&gcc GCC_EMAC1_SLV_AHB_CLK>,
+				 <&gcc GCC_EMAC1_PTP_CLK>,
+				 <&gcc GCC_EMAC1_PHY_AUX_CLK>;
+			clock-names = "stmmaceth",
+				      "pclk",
+				      "ptp_ref",
+				      "phyaux";
+
+			power-domains = <&gcc EMAC1_GDSC>;
+
+			phys = <&serdes1>;
+			phy-names = "serdes";
+
+			iommus = <&apps_smmu 0x140 0xf>;
+
+			snps,tso;
+			snps,pbl = <32>;
+			rx-fifo-depth = <16384>;
+			tx-fifo-depth = <16384>;
+
+			status = "disabled";
+		};
+
 		ethernet0: ethernet@23040000 {
 			compatible = "qcom,sa8775p-ethqos";
 			reg = <0x0 0x23040000 0x0 0x10000>,
-- 
2.39.2


  parent reply	other threads:[~2023-08-10  8:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-10  8:09 [PATCH v3 0/9] arm64: dts: qcom: enable EMAC1 on sa8775p Bartosz Golaszewski
2023-08-10  8:09 ` [PATCH v3 1/9] arm64: dts: qcom: sa8775p: add a node for the second serdes PHY Bartosz Golaszewski
2023-08-10  8:09 ` Bartosz Golaszewski [this message]
2023-08-10  8:09 ` [PATCH v3 3/9] arm64: dts: qcom: sa8775p-ride: enable the second SerDes PHY Bartosz Golaszewski
2023-08-10  8:09 ` [PATCH v3 4/9] arm64: dts: qcom: sa8775p-ride: move the reset-gpios property of the PHY Bartosz Golaszewski
2023-08-10  8:09 ` [PATCH v3 5/9] arm64: dts: qcom: sa8775p-ride: index the first SGMII PHY Bartosz Golaszewski
2023-08-10  8:09 ` [PATCH v3 6/9] arm64: dts: qcom: sa8775p-ride: add the second " Bartosz Golaszewski
2023-08-10  8:09 ` [PATCH v3 7/9] arm64: dts: qcom: sa8775p-ride: sort aliases alphabetically Bartosz Golaszewski
2023-08-10 13:26   ` Konrad Dybcio
2023-08-10  8:09 ` [PATCH v3 8/9] arm64: dts: qcom: sa8775p-ride: add an alias for ethernet0 Bartosz Golaszewski
2023-08-10 13:26   ` Konrad Dybcio
2023-08-10  8:09 ` [PATCH v3 9/9] arm64: dts: qcom: sa8775p-ride: enable EMAC1 Bartosz Golaszewski
2023-08-10 20:13 ` [PATCH v3 0/9] arm64: dts: qcom: enable EMAC1 on sa8775p Andrew Halaney
2023-08-11 12:00   ` Bartosz Golaszewski
2023-08-11 13:07     ` Andrew Halaney
2023-08-14  2:02 ` Bjorn Andersson

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