From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Cc: helgaas@kernel.org, linux-pci@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com,
quic_skananth@quicinc.com, quic_ramkri@quicinc.com,
quic_parass@quicinc.com, krzysztof.kozlowski@linaro.org,
"Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>
Subject: Re: [PATCH v4 1/4] dt-bindings: pci: qcom: Add opp table
Date: Wed, 23 Aug 2023 11:55:06 +0530 [thread overview]
Message-ID: <20230823062506.GD3737@thinkpad> (raw)
In-Reply-To: <1692717141-32743-2-git-send-email-quic_krichai@quicinc.com>
On Tue, Aug 22, 2023 at 08:42:18PM +0530, Krishna chaitanya chundru wrote:
> PCIe needs to choose the appropriate performance state of RPMH power
> domain based upon the PCIe gen speed.
>
> Adding the Operating Performance Points table allows to adjust power domain
> performance state, depending on the PCIe gen speed.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- Mani
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 81971be4..779339c 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -121,6 +121,10 @@ properties:
> description: GPIO controlled connection to WAKE# signal
> maxItems: 1
>
> + operating-points-v2: true
> + opp-table:
> + type: object
> +
> required:
> - compatible
> - reg
> --
> 2.7.4
>
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2023-08-23 6:25 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-22 15:12 [PATCH v4 0/4] PCI: qcom: Add support for OPP Krishna chaitanya chundru
2023-08-22 15:12 ` [PATCH v4 1/4] dt-bindings: pci: qcom: Add opp table Krishna chaitanya chundru
2023-08-22 16:06 ` Konrad Dybcio
2023-09-07 6:01 ` Krishna Chaitanya Chundru
2023-08-23 6:25 ` Manivannan Sadhasivam [this message]
2023-08-22 15:12 ` [PATCH v4 2/4] arm64: dts: qcom: sm8450: Add opp table support to PCIe Krishna chaitanya chundru
2023-08-22 15:12 ` [PATCH v4 3/4] OPP: Add api to retrieve opps which is at most the provided level Krishna chaitanya chundru
2023-08-22 21:33 ` kernel test robot
2023-08-22 23:10 ` kernel test robot
2023-08-22 23:42 ` kernel test robot
2023-08-23 0:48 ` kernel test robot
2023-08-23 1:05 ` Pavan Kondeti
2023-09-07 6:04 ` Krishna Chaitanya Chundru
2023-08-23 1:13 ` kernel test robot
2023-08-22 15:12 ` [PATCH v4 4/4] PCI: qcom: Add OPP support for speed based performance state of RPMH Krishna chaitanya chundru
2023-08-23 7:06 ` Manivannan Sadhasivam
2023-09-07 6:05 ` Krishna Chaitanya Chundru
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