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([179.93.21.19]) by smtp.gmail.com with ESMTPSA id ds23-20020a0568705b1700b001c50fb56845sm966189oab.16.2023.08.25.06.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Aug 2023 06:10:00 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH 20/20] target/riscv: add 'kvm_supported' class property Date: Fri, 25 Aug 2023 10:08:53 -0300 Message-ID: <20230825130853.511782-21-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230825130853.511782-1-dbarboza@ventanamicro.com> References: <20230825130853.511782-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2001:4860:4864:20::2c; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org This follows the same idea of 'tcg_support' property added in the previous patch. Note that we're now implementing the 'cpu_realizefn' for the KVMAccel class since this verification is done in realize() time. Supporting vendor CPUs with KVM is not possible. We rely on the extension support of the KVM module running in the host, making it impossible to guarantee that a vendor CPU will have all the required extensions available. The only way to guarantee that a vendor CPU is KVM compatible is running KVM in a host that has the same vendor CPU, and for this case we already have the 'host' CPU type. We're better of declaring that all vendors CPUs are not KVM capable. After this patch, running KVM accel with a vendor CPU will produce an error like the following: $ ./qemu-system-riscv64 -M virt,accel=kvm -cpu veyron-v1 qemu-system-riscv64: 'veyron-v1' CPU is not compatible with KVM acceleration Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 1 + target/riscv/kvm/kvm-cpu.c | 24 ++++++++++++++++++++++++ 3 files changed, 26 insertions(+) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index e86b76f9fe..32d9bb07b4 100644 --- a/target/riscv/cpu-qom.h +++ b/target/riscv/cpu-qom.h @@ -72,5 +72,6 @@ struct RISCVCPUClass { bool user_extension_properties; bool tcg_supported; + bool kvm_supported; }; #endif /* RISCV_CPU_QOM_H */ diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f749ea2a2e..73302bb72a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1646,6 +1646,7 @@ static void riscv_dynamic_cpu_class_init(ObjectClass *c, void *data) rcc->user_extension_properties = true; rcc->tcg_supported = true; + rcc->kvm_supported = true; } static void riscv_vendor_cpu_class_init(ObjectClass *c, void *data) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 501384924b..85f3b8c80e 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -1289,6 +1289,7 @@ static void riscv_kvm_cpu_class_init(ObjectClass *c, void *data) RISCVCPUClass *rcc = RISCV_CPU_CLASS(c); rcc->user_extension_properties = true; + rcc->kvm_supported = true; } static const TypeInfo riscv_kvm_cpu_type_infos[] = { @@ -1302,6 +1303,28 @@ static const TypeInfo riscv_kvm_cpu_type_infos[] = { DEFINE_TYPES(riscv_kvm_cpu_type_infos) +/* + * We'll get here via the following path: + * + * riscv_cpu_realize() + * -> cpu_exec_realizefn() + * -> kvm_cpu_realizefn() (via accel_cpu_realizefn()) + */ +static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) +{ + RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPUClass *rcc = RISCV_CPU_GET_CLASS(cpu); + + if (!rcc->kvm_supported) { + g_autofree char *name = riscv_cpu_get_name(rcc); + error_setg(errp, "'%s' CPU is not compatible with KVM acceleration", + name); + return false; + } + + return true; +} + static void kvm_cpu_instance_init(CPUState *cs) { Object *obj = OBJECT(RISCV_CPU(cs)); @@ -1328,6 +1351,7 @@ static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data) AccelCPUClass *acc = ACCEL_CPU_CLASS(oc); acc->cpu_instance_init = kvm_cpu_instance_init; + acc->cpu_realizefn = kvm_cpu_realizefn; } static const TypeInfo kvm_cpu_accel_type_info = { -- 2.41.0