Re: [PATCH v4 04/23] dt-bindings: cache: describe L2 cache on Qualcomm Krait platforms

[Rob Herring <robh@kernel.org>]

On Sun, Aug 27, 2023 at 02:50:14PM +0300, Dmitry Baryshkov wrote:
> The L2 cache device on Qualcomm Krait platforms controls the supplying
> voltages and the cache frequency. Add corresponding bindings for this
> device.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  .../bindings/cache/qcom,krait-l2-cache.yaml   | 86 +++++++++++++++++++
>  include/dt-bindings/soc/qcom,krait-l2-cache.h | 12 +++
>  2 files changed, 98 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml
>  create mode 100644 include/dt-bindings/soc/qcom,krait-l2-cache.h
> 
> diff --git a/Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml b/Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml
> new file mode 100644
> index 000000000000..59ce11dd0a24
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml
> @@ -0,0 +1,86 @@
> +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)

'only', not 'or-later'

With that,

Reviewed-by: Rob Herring <robh@kernel.org>

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/cache/qcom,krait-l2-cache.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Krait L2 Cache
> +
> +maintainers:
> +  - Bjorn Andersson <andersson@kernel.org>
> +
> +description:
> +  L2 cache on Qualcomm Krait platforms is shared between all CPU cores. L2
> +  cache frequency and voltages should be scaled according to the needs of the
> +  cores.
> +
> +allOf:
> +  - $ref: /schemas/cache-controller.yaml#
> +
> +select:
> +  properties:
> +    compatible:
> +      contains:
> +        enum:
> +          - qcom,krait-l2-cache
> +
> +  required:
> +    - compatible
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: qcom,krait-l2-cache
> +      - const: cache
> +
> +  clocks:
> +    maxItems: 1
> +
> +  '#interconnect-cells':
> +    const: 1
> +
> +  vdd-mem-supply:
> +    description: suppling regulator for the memory cells of the cache
> +
> +  vdd-dig-supply:
> +    description: suppling regulator for the digital logic of the cache
> +
> +  operating-points-v2: true
> +  opp-table:
> +    type: object
> +
> +required:
> +  - compatible
> +  - cache-level
> +  - cache-unified
> +  - clocks
> +  - '#interconnect-cells'
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/soc/qcom,krait-l2-cache.h>
> +
> +    l2-cache {
> +        compatible = "qcom,krait-l2-cache", "cache";
> +        cache-level = <2>;
> +        cache-unified;
> +        vdd-mem-supply = <&pm8921_l24>;
> +        vdd-dig-supply = <&pm8921_s3>;
> +        clocks = <&kraitcc 4>;
> +        #interconnect-cells = <1>;
> +        operating-points-v2 = <&l2_opp_table>;
> +
> +        l2_opp_table: opp-table {
> +            compatible = "operating-points-v2";
> +
> +            opp-384000000 {
> +                opp-hz = /bits/ 64 <384000000>;
> +                opp-microvolt = <1050000 1050000 1150000>,
> +                                <950000 950000 1150000>;
> +            };
> +        };
> +    };
> +...
> +
> diff --git a/include/dt-bindings/soc/qcom,krait-l2-cache.h b/include/dt-bindings/soc/qcom,krait-l2-cache.h
> new file mode 100644
> index 000000000000..c9a38d368111
> --- /dev/null
> +++ b/include/dt-bindings/soc/qcom,krait-l2-cache.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (C) 2023 Linaro Ltd. All rights reserved.
> + */
> +
> +#ifndef __DT_BINDINGS_SOC_QCOM_KRAIT_L2_CACHE_H
> +#define __DT_BINDINGS_SOC_QCOM_KRAIT_L2_CACHE_H
> +
> +#define MASTER_KRAIT_L2		0
> +#define SLAVE_KRAIT_L2		1
> +
> +#endif
> -- 
> 2.39.2
>