[chrome-os:chromeos-5.10 37/39] drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'is_ck_de_pol' not described in 'mtk_dpi_conf'

[kernel test robot <lkp@intel.com>]

tree:   https://chromium.googlesource.com/chromiumos/third_party/kernel chromeos-5.10
head:   01b0f7911af24417437d518fbca859a0e2caf01c
commit: 061dbb2e0300b2aa141f67fd09c6e08504e70ee4 [37/39] UPSTREAM: drm/mediatek: dpi: Add kernel document for struct mtk_dpi_conf
config: arm64-randconfig-r002-20230828 (https://download.01.org/0day-ci/archive/20230828/202308282307.9CySMB7w-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230828/202308282307.9CySMB7w-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308282307.9CySMB7w-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'is_ck_de_pol' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'is_dpintf' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'csc_support' not described in 'mtk_dpi_conf'
   drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'swap_input_support' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'dimension_mask' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'hvsize_mask' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'channel_swap_shift' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'yuv422_en_bit' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'csc_enable_bit' not described in 'mtk_dpi_conf'
>> drivers/gpu/drm/mediatek/mtk_dpi.c:153: warning: Function parameter or member 'limit' not described in 'mtk_dpi_conf'


vim +153 drivers/gpu/drm/mediatek/mtk_dpi.c

9e629c17aa8d7a Jie Qiu      2016-01-04  124  
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  125  /**
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  126   * struct mtk_dpi_conf - Configuration of mediatek dpi.
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  127   * @cal_factor: Callback function to calculate factor value.
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  128   * @reg_h_fre_con: Register address of frequency control.
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  129   * @max_clock_khz: Max clock frequency supported for this SoCs in khz units.
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  130   * @edge_sel_en: Enable of edge selection.
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  131   * @output_fmts: Array of supported output formats.
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  132   * @num_output_fmts: Quantity of supported output formats.
061dbb2e0300b2 Bo-Chen Chen 2022-07-01  133   */
0ace4b993c7a52 chunhui dai  2018-10-03  134  struct mtk_dpi_conf {
55c78aa5c808ba chunhui dai  2018-10-03  135  	unsigned int (*cal_factor)(int clock);
0ace4b993c7a52 chunhui dai  2018-10-03  136  	u32 reg_h_fre_con;
5f76153de6c927 Rex-BC Chen  2021-03-18  137  	u32 max_clock_khz;
79080159a7c1bc chunhui dai  2018-10-03  138  	bool edge_sel_en;
595945ce9b6d81 Rex-BC Chen  2021-05-26  139  	const u32 *output_fmts;
595945ce9b6d81 Rex-BC Chen  2021-05-26  140  	u32 num_output_fmts;
270385f0bcbda8 Jitao Shi    2021-11-24  141  	bool is_ck_de_pol;
270385f0bcbda8 Jitao Shi    2021-11-24  142  	bool is_dpintf;
270385f0bcbda8 Jitao Shi    2021-11-24  143  	bool csc_support;
270385f0bcbda8 Jitao Shi    2021-11-24  144  	bool swap_input_support;
270385f0bcbda8 Jitao Shi    2021-11-24  145  	// Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH (no shift)
270385f0bcbda8 Jitao Shi    2021-11-24  146  	u32 dimension_mask;
270385f0bcbda8 Jitao Shi    2021-11-24  147  	// Mask used for HSIZE and VSIZE (no shift)
270385f0bcbda8 Jitao Shi    2021-11-24  148  	u32 hvsize_mask;
270385f0bcbda8 Jitao Shi    2021-11-24  149  	u32 channel_swap_shift;
270385f0bcbda8 Jitao Shi    2021-11-24  150  	u32 yuv422_en_bit;
9fc1f39630d4af Jitao Shi    2021-11-24  151  	u32 csc_enable_bit;
270385f0bcbda8 Jitao Shi    2021-11-24  152  	const struct mtk_dpi_yc_limit *limit;
0ace4b993c7a52 chunhui dai  2018-10-03 @153  };
0ace4b993c7a52 chunhui dai  2018-10-03  154  

:::::: The code at line 153 was first introduced by commit
:::::: 0ace4b993c7a524962c6c17f3956a2d3cf2454e1 drm/mediatek: move hardware register to node data

:::::: TO: chunhui dai <chunhui.dai@mediatek.com>
:::::: CC: CK Hu <ck.hu@mediatek.com>

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