[jsarha:topic/cros-sof-v4.14-rebase 4170/9999] sound/soc/intel/skylake/skl.c:104:6: warning: no previous prototype for function 'skl_clock_power_gating'

[kernel test robot <lkp@intel.com>]

tree:   https://github.com/jsarha/linux topic/cros-sof-v4.14-rebase
head:   18a233f3f676a98dde00947535d99ab1a54da340
commit: 823458db70476ac7af7d103fa4fd99d62e8f989d [4170/9999] CHROMIUM: ASoC: Intel: Fix skylake backports
config: x86_64-buildonly-randconfig-002-20230830 (https://download.01.org/0day-ci/archive/20230830/202308301241.3PRWWFkK-lkp@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230830/202308301241.3PRWWFkK-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308301241.3PRWWFkK-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> sound/soc/intel/skylake/skl.c:104:6: warning: no previous prototype for function 'skl_clock_power_gating' [-Wmissing-prototypes]
   void skl_clock_power_gating(struct device *dev, bool enable)
        ^
   sound/soc/intel/skylake/skl.c:104:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void skl_clock_power_gating(struct device *dev, bool enable)
   ^
   static 
   1 warning generated.
   sound/soc/intel/skylake/.tmp_skl.o: warning: objtool: missing symbol for section .init.text


vim +/skl_clock_power_gating +104 sound/soc/intel/skylake/skl.c

    97	
    98	/**
    99	 * skl_clock_power_gating: Enable/Disable clock and power gating
   100	 *
   101	 * @dev: Device pointer
   102	 * @enable: Enable/Disable flag
   103	 */
 > 104	void skl_clock_power_gating(struct device *dev, bool enable)
   105	{
   106		struct pci_dev *pci = to_pci_dev(dev);
   107		struct hdac_bus *bus = pci_get_drvdata(pci);
   108		u32 val;
   109	
   110		/* Update PDCGE bit of CGCTL register */
   111		val = enable ? AZX_CGCTL_ADSPDCGE : 0;
   112		update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_ADSPDCGE, val);
   113	
   114		/* Update L1SEN bit of EM2 register */
   115		val = enable ? AZX_REG_VS_EM2_L1SEN : 0;
   116		snd_hdac_chip_updatel(bus, VS_EM2, AZX_REG_VS_EM2_L1SEN, val);
   117	
   118		/* Update ADSPPGD bit of PGCTL register */
   119		val = enable ? 0 : AZX_PGCTL_ADSPPGD;
   120		update_pci_dword(pci, AZX_PCIREG_PGCTL, AZX_PGCTL_ADSPPGD, val);
   121	}
   122	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki