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From: deller@kernel.org
To: linux-parisc@vger.kernel.org
Cc: Helge Deller <deller@gmx.de>
Subject: [PATCH] parisc: shmparam.h: Document aliasing requirements of PA-RISC
Date: Fri,  1 Sep 2023 08:04:31 +0200	[thread overview]
Message-ID: <20230901060431.6170-1-deller@kernel.org> (raw)

From: Helge Deller <deller@gmx.de>

Add some documentation why PA-RISC uses SHMLBA and SHM_COLOUR.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 arch/parisc/include/asm/shmparam.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/parisc/include/asm/shmparam.h b/arch/parisc/include/asm/shmparam.h
index 74f74e4d35b7..5a95b0f62b87 100644
--- a/arch/parisc/include/asm/shmparam.h
+++ b/arch/parisc/include/asm/shmparam.h
@@ -2,6 +2,21 @@
 #ifndef _ASMPARISC_SHMPARAM_H
 #define _ASMPARISC_SHMPARAM_H
 
+/*
+ * PA-RISC uses virtually indexed & physically tagged (VIPT) caches
+ * which has strict requirements when two pages to the same physical
+ * address are accessed through different mappings. Read the section
+ * "Address Aliasing" in the arch docs for more detail:
+ * PA-RISC 1.1 (page 3-6):
+ * https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
+ * PA-RISC 2.0 (page F-5):
+ * https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
+ *
+ * For Linux we allow kernel and userspace to map pages on page size
+ * granularity (SHMLBA) but have to ensure that, if two pages are
+ * mapped to the same physical address, the virtual and physical
+ * addresses modulo SHM_COLOUR are identical.
+ */
 #define SHMLBA	   PAGE_SIZE	/* attach addr a multiple of this */
 #define SHM_COLOUR 0x00400000	/* shared mappings colouring */
 
-- 
2.41.0


             reply	other threads:[~2023-09-01  6:04 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-01  6:04 deller [this message]
2023-09-04 17:57 ` [PATCH] parisc: shmparam.h: Document aliasing requirements of PA-RISC John David Anglin

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