From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: linux-pci@vger.kernel.org,
Jesse Brandeburg <jesse.brandeburg@intel.com>,
linux-kernel@vger.kernel.org, Eric Dumazet <edumazet@google.com>,
netdev@vger.kernel.org, Tony Nguyen <anthony.l.nguyen@intel.com>,
Jakub Kicinski <kuba@kernel.org>,
Bjorn Helgaas <helgaas@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
"David S. Miller" <davem@davemloft.net>,
intel-wired-lan@lists.osuosl.org
Subject: Re: [Intel-wired-lan] [PATCH v2 09/10] e1000e: Use PCI_EXP_LNKSTA_NLW & FIELD_GET() instead of custom defines/code
Date: Wed, 13 Sep 2023 14:17:03 +0100 [thread overview]
Message-ID: <20230913141703.000078e2@Huawei.com> (raw)
In-Reply-To: <20230913122748.29530-10-ilpo.jarvinen@linux.intel.com>
On Wed, 13 Sep 2023 15:27:47 +0300
Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> wrote:
> e1000e has own copy of PCI Negotiated Link Width field defines. Use the
> one from include/uapi/linux/pci_regs.h instead of the custom ones and
> remove the custom ones. Also convert to use FIELD_GET().
>
> Suggested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> drivers/net/ethernet/intel/e1000e/defines.h | 2 --
> drivers/net/ethernet/intel/e1000e/mac.c | 7 ++++---
> 2 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h
> index 63c3c79380a1..a4d29c9e03a6 100644
> --- a/drivers/net/ethernet/intel/e1000e/defines.h
> +++ b/drivers/net/ethernet/intel/e1000e/defines.h
> @@ -681,8 +681,6 @@
> #define PCIE_LINK_STATUS 0x12
>
> #define PCI_HEADER_TYPE_MULTIFUNC 0x80
> -#define PCIE_LINK_WIDTH_MASK 0x3F0
> -#define PCIE_LINK_WIDTH_SHIFT 4
>
> #define PHY_REVISION_MASK 0xFFFFFFF0
> #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
> diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c
> index 5df7ad93f3d7..5340cf73778d 100644
> --- a/drivers/net/ethernet/intel/e1000e/mac.c
> +++ b/drivers/net/ethernet/intel/e1000e/mac.c
> @@ -1,6 +1,8 @@
> // SPDX-License-Identifier: GPL-2.0
> /* Copyright(c) 1999 - 2018 Intel Corporation. */
>
> +#include <linux/bitfield.h>
> +
> #include "e1000.h"
>
> /**
> @@ -25,9 +27,8 @@ s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw)
> pci_read_config_word(adapter->pdev,
> cap_offset + PCIE_LINK_STATUS,
> &pcie_link_status);
> - bus->width = (enum e1000_bus_width)((pcie_link_status &
> - PCIE_LINK_WIDTH_MASK) >>
> - PCIE_LINK_WIDTH_SHIFT);
> + bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW,
> + pcie_link_status);
> }
>
> mac->ops.set_lan_id(hw);
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WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: <linux-pci@vger.kernel.org>, Bjorn Helgaas <helgaas@kernel.org>,
"Jesse Brandeburg" <jesse.brandeburg@intel.com>,
Tony Nguyen <anthony.l.nguyen@intel.com>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
<intel-wired-lan@lists.osuosl.org>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 09/10] e1000e: Use PCI_EXP_LNKSTA_NLW & FIELD_GET() instead of custom defines/code
Date: Wed, 13 Sep 2023 14:17:03 +0100 [thread overview]
Message-ID: <20230913141703.000078e2@Huawei.com> (raw)
In-Reply-To: <20230913122748.29530-10-ilpo.jarvinen@linux.intel.com>
On Wed, 13 Sep 2023 15:27:47 +0300
Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> wrote:
> e1000e has own copy of PCI Negotiated Link Width field defines. Use the
> one from include/uapi/linux/pci_regs.h instead of the custom ones and
> remove the custom ones. Also convert to use FIELD_GET().
>
> Suggested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> drivers/net/ethernet/intel/e1000e/defines.h | 2 --
> drivers/net/ethernet/intel/e1000e/mac.c | 7 ++++---
> 2 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h
> index 63c3c79380a1..a4d29c9e03a6 100644
> --- a/drivers/net/ethernet/intel/e1000e/defines.h
> +++ b/drivers/net/ethernet/intel/e1000e/defines.h
> @@ -681,8 +681,6 @@
> #define PCIE_LINK_STATUS 0x12
>
> #define PCI_HEADER_TYPE_MULTIFUNC 0x80
> -#define PCIE_LINK_WIDTH_MASK 0x3F0
> -#define PCIE_LINK_WIDTH_SHIFT 4
>
> #define PHY_REVISION_MASK 0xFFFFFFF0
> #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
> diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c
> index 5df7ad93f3d7..5340cf73778d 100644
> --- a/drivers/net/ethernet/intel/e1000e/mac.c
> +++ b/drivers/net/ethernet/intel/e1000e/mac.c
> @@ -1,6 +1,8 @@
> // SPDX-License-Identifier: GPL-2.0
> /* Copyright(c) 1999 - 2018 Intel Corporation. */
>
> +#include <linux/bitfield.h>
> +
> #include "e1000.h"
>
> /**
> @@ -25,9 +27,8 @@ s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw)
> pci_read_config_word(adapter->pdev,
> cap_offset + PCIE_LINK_STATUS,
> &pcie_link_status);
> - bus->width = (enum e1000_bus_width)((pcie_link_status &
> - PCIE_LINK_WIDTH_MASK) >>
> - PCIE_LINK_WIDTH_SHIFT);
> + bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW,
> + pcie_link_status);
> }
>
> mac->ops.set_lan_id(hw);
next prev parent reply other threads:[~2023-09-13 15:10 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-13 12:27 [PATCH v2 00/10] PCI/treewide: PCIe capability access cleanups Ilpo Järvinen
2023-09-13 12:27 ` [PATCH v2 01/10] IB/hfi1: Use FIELD_GET() to extract Link Width Ilpo Järvinen
2023-09-13 13:14 ` Jonathan Cameron
2023-09-13 12:27 ` [PATCH v2 02/10] media: cobalt: " Ilpo Järvinen
2023-09-13 12:27 ` [Intel-wired-lan] [PATCH v2 03/10] igb: " Ilpo Järvinen
2023-09-13 12:27 ` Ilpo Järvinen
2023-09-13 12:27 ` [PATCH v2 04/10] PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields Ilpo Järvinen
2023-09-13 12:27 ` [PATCH v2 05/10] PCI: mvebu: Use FIELD_PREP() with Link Width Ilpo Järvinen
2023-09-13 12:27 ` Ilpo Järvinen
2023-09-13 12:27 ` [PATCH v2 06/10] PCI: Use FIELD_GET() to extract " Ilpo Järvinen
2023-09-13 12:27 ` [PATCH v2 07/10] scsi: esas2r: Use FIELD_GET() to extract PCIe capability fields Ilpo Järvinen
2023-09-13 13:15 ` Jonathan Cameron
2023-09-14 1:02 ` Martin K. Petersen
2023-09-13 12:27 ` [PATCH v2 08/10] scsi: qla2xxx: " Ilpo Järvinen
2023-09-13 13:16 ` Jonathan Cameron
2023-09-14 1:02 ` Martin K. Petersen
2023-09-13 12:27 ` [Intel-wired-lan] [PATCH v2 09/10] e1000e: Use PCI_EXP_LNKSTA_NLW & FIELD_GET() instead of custom defines/code Ilpo Järvinen
2023-09-13 12:27 ` Ilpo Järvinen
2023-09-13 13:17 ` Jonathan Cameron [this message]
2023-09-13 13:17 ` Jonathan Cameron
2023-09-13 12:27 ` [Intel-wired-lan] [PATCH v2 10/10] e1000e: Use pcie_capability_read_word() for reading LNKSTA Ilpo Järvinen
2023-09-13 12:27 ` Ilpo Järvinen
2023-09-13 13:22 ` [Intel-wired-lan] " Jonathan Cameron
2023-09-13 13:22 ` Jonathan Cameron
2023-09-22 1:05 ` (subset) [PATCH v2 00/10] PCI/treewide: PCIe capability access cleanups Martin K. Petersen
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